Version 3.2 HI-TECH Software Intermediate Code
"623 C:\Program Files\HI-TECH Software\PICC-18\9.80\include\pic18f4520.h
[v _TRISA `Vuc ~T0 0 e@3986 ]
"686
[v _TRISB `Vuc ~T0 0 e@3987 ]
"17
[v _PORTA `Vuc ~T0 0 e@3968 ]
"88
[v _PORTB `Vuc ~T0 0 e@3969 ]
[p mainexit ]
[; ;pic18f4520.h: 17: extern volatile unsigned char PORTA @ 0xF80;
"19 C:\Program Files\HI-TECH Software\PICC-18\9.80\include\pic18f4520.h
[; ;pic18f4520.h: 19: asm("PORTA equ 0F80h");
[; <" PORTA equ 0F80h ;# ">
[; ;pic18f4520.h: 22: extern volatile union {
[; ;pic18f4520.h: 23: struct {
[; ;pic18f4520.h: 24: unsigned RA0 :1;
[; ;pic18f4520.h: 25: unsigned RA1 :1;
[; ;pic18f4520.h: 26: unsigned RA2 :1;
[; ;pic18f4520.h: 27: unsigned RA3 :1;
[; ;pic18f4520.h: 28: unsigned RA4 :1;
[; ;pic18f4520.h: 29: unsigned RA5 :1;
[; ;pic18f4520.h: 30: unsigned RA6 :1;
[; ;pic18f4520.h: 31: unsigned RA7 :1;
[; ;pic18f4520.h: 32: };
[; ;pic18f4520.h: 33: struct {
[; ;pic18f4520.h: 34: unsigned RA :8;
[; ;pic18f4520.h: 35: };
[; ;pic18f4520.h: 36: struct {
[; ;pic18f4520.h: 37: unsigned AN0 :1;
[; ;pic18f4520.h: 38: unsigned AN1 :1;
[; ;pic18f4520.h: 39: unsigned AN2 :1;
[; ;pic18f4520.h: 40: unsigned AN3 :1;
[; ;pic18f4520.h: 41: unsigned T0CKI :1;
[; ;pic18f4520.h: 42: unsigned AN4 :1;
[; ;pic18f4520.h: 43: unsigned OSC2 :1;
[; ;pic18f4520.h: 44: unsigned OSC1 :1;
[; ;pic18f4520.h: 45: };
[; ;pic18f4520.h: 46: struct {
[; ;pic18f4520.h: 47: unsigned :2;
[; ;pic18f4520.h: 48: unsigned VREFN :1;
[; ;pic18f4520.h: 49: unsigned VREFP :1;
[; ;pic18f4520.h: 50: unsigned :1;
[; ;pic18f4520.h: 51: unsigned SS :1;
[; ;pic18f4520.h: 52: unsigned CLKO :1;
[; ;pic18f4520.h: 53: unsigned CLKI :1;
[; ;pic18f4520.h: 54: };
[; ;pic18f4520.h: 55: struct {
[; ;pic18f4520.h: 56: unsigned :5;
[; ;pic18f4520.h: 57: unsigned NOT_SS :1;
[; ;pic18f4520.h: 58: };
[; ;pic18f4520.h: 59: struct {
[; ;pic18f4520.h: 60: unsigned :2;
[; ;pic18f4520.h: 61: unsigned CVREF :1;
[; ;pic18f4520.h: 62: unsigned :2;
[; ;pic18f4520.h: 63: unsigned nSS :1;
[; ;pic18f4520.h: 64: };
[; ;pic18f4520.h: 65: struct {
[; ;pic18f4520.h: 66: unsigned :5;
[; ;pic18f4520.h: 67: unsigned LVDIN :1;
[; ;pic18f4520.h: 68: };
[; ;pic18f4520.h: 69: struct {
[; ;pic18f4520.h: 70: unsigned :5;
[; ;pic18f4520.h: 71: unsigned HLVDIN :1;
[; ;pic18f4520.h: 72: };
[; ;pic18f4520.h: 73: struct {
[; ;pic18f4520.h: 74: unsigned :4;
[; ;pic18f4520.h: 75: unsigned C1OUT :1;
[; ;pic18f4520.h: 76: unsigned C2OUT :1;
[; ;pic18f4520.h: 77: };
[; ;pic18f4520.h: 78: struct {
[; ;pic18f4520.h: 79: unsigned :7;
[; ;pic18f4520.h: 80: unsigned RJPU :1;
[; ;pic18f4520.h: 81: };
[; ;pic18f4520.h: 82: struct {
[; ;pic18f4520.h: 83: unsigned ULPWUIN :1;
[; ;pic18f4520.h: 84: };
[; ;pic18f4520.h: 85: } PORTAbits @ 0xF80;
[; ;pic18f4520.h: 88: extern volatile unsigned char PORTB @ 0xF81;
"90
[; ;pic18f4520.h: 90: asm("PORTB equ 0F81h");
[; <" PORTB equ 0F81h ;# ">
[; ;pic18f4520.h: 93: extern volatile union {
[; ;pic18f4520.h: 94: struct {
[; ;pic18f4520.h: 95: unsigned RB0 :1;
[; ;pic18f4520.h: 96: unsigned RB1 :1;
[; ;pic18f4520.h: 97: unsigned RB2 :1;
[; ;pic18f4520.h: 98: unsigned RB3 :1;
[; ;pic18f4520.h: 99: unsigned RB4 :1;
[; ;pic18f4520.h: 100: unsigned RB5 :1;
[; ;pic18f4520.h: 101: unsigned RB6 :1;
[; ;pic18f4520.h: 102: unsigned RB7 :1;
[; ;pic18f4520.h: 103: };
[; ;pic18f4520.h: 104: struct {
[; ;pic18f4520.h: 105: unsigned RB :8;
[; ;pic18f4520.h: 106: };
[; ;pic18f4520.h: 107: struct {
[; ;pic18f4520.h: 108: unsigned INT0 :1;
[; ;pic18f4520.h: 109: unsigned INT1 :1;
[; ;pic18f4520.h: 110: unsigned INT2 :1;
[; ;pic18f4520.h: 111: unsigned CCP2 :1;
[; ;pic18f4520.h: 112: unsigned KBI0 :1;
[; ;pic18f4520.h: 113: unsigned KBI1 :1;
[; ;pic18f4520.h: 114: unsigned KBI2 :1;
[; ;pic18f4520.h: 115: unsigned KBI3 :1;
[; ;pic18f4520.h: 116: };
[; ;pic18f4520.h: 117: struct {
[; ;pic18f4520.h: 118: unsigned AN12 :1;
[; ;pic18f4520.h: 119: unsigned AN10 :1;
[; ;pic18f4520.h: 120: unsigned AN8 :1;
[; ;pic18f4520.h: 121: unsigned AN9 :1;
[; ;pic18f4520.h: 122: unsigned AN11 :1;
[; ;pic18f4520.h: 123: unsigned PGM :1;
[; ;pic18f4520.h: 124: unsigned PGC :1;
[; ;pic18f4520.h: 125: unsigned PGD :1;
[; ;pic18f4520.h: 126: };
[; ;pic18f4520.h: 127: struct {
[; ;pic18f4520.h: 128: unsigned FLT0 :1;
[; ;pic18f4520.h: 129: };
[; ;pic18f4520.h: 130: struct {
[; ;pic18f4520.h: 131: unsigned :3;
[; ;pic18f4520.h: 132: unsigned CCP2_PA2 :1;
[; ;pic18f4520.h: 133: };
[; ;pic18f4520.h: 134: } PORTBbits @ 0xF81;
[; ;pic18f4520.h: 137: extern volatile unsigned char PORTC @ 0xF82;
"139
[; ;pic18f4520.h: 139: asm("PORTC equ 0F82h");
[; <" PORTC equ 0F82h ;# ">
[; ;pic18f4520.h: 142: extern volatile union {
[; ;pic18f4520.h: 143: struct {
[; ;pic18f4520.h: 144: unsigned RC0 :1;
[; ;pic18f4520.h: 145: unsigned RC1 :1;
[; ;pic18f4520.h: 146: unsigned RC2 :1;
[; ;pic18f4520.h: 147: unsigned RC3 :1;
[; ;pic18f4520.h: 148: unsigned RC4 :1;
[; ;pic18f4520.h: 149: unsigned RC5 :1;
[; ;pic18f4520.h: 150: unsigned RC6 :1;
[; ;pic18f4520.h: 151: unsigned RC7 :1;
[; ;pic18f4520.h: 152: };
[; ;pic18f4520.h: 153: struct {
[; ;pic18f4520.h: 154: unsigned RC :8;
[; ;pic18f4520.h: 155: };
[; ;pic18f4520.h: 156: struct {
[; ;pic18f4520.h: 157: unsigned T1OSO :1;
[; ;pic18f4520.h: 158: unsigned T1OSI :1;
[; ;pic18f4520.h: 159: unsigned CCP1 :1;
[; ;pic18f4520.h: 160: unsigned SCK :1;
[; ;pic18f4520.h: 161: unsigned SDI :1;
[; ;pic18f4520.h: 162: unsigned SDO :1;
[; ;pic18f4520.h: 163: unsigned TX :1;
[; ;pic18f4520.h: 164: unsigned RX :1;
[; ;pic18f4520.h: 165: };
[; ;pic18f4520.h: 166: struct {
[; ;pic18f4520.h: 167: unsigned T13CKI :1;
[; ;pic18f4520.h: 168: unsigned CCP2 :1;
[; ;pic18f4520.h: 169: unsigned :1;
[; ;pic18f4520.h: 170: unsigned SCL :1;
[; ;pic18f4520.h: 171: unsigned SDA :1;
[; ;pic18f4520.h: 172: unsigned :1;
[; ;pic18f4520.h: 173: unsigned CK :1;
[; ;pic18f4520.h: 174: unsigned DT :1;
[; ;pic18f4520.h: 175: };
[; ;pic18f4520.h: 176: struct {
[; ;pic18f4520.h: 177: unsigned T1CKI :1;
[; ;pic18f4520.h: 178: unsigned :1;
[; ;pic18f4520.h: 179: unsigned P1A :1;
[; ;pic18f4520.h: 180: };
[; ;pic18f4520.h: 181: struct {
[; ;pic18f4520.h: 182: unsigned :2;
[; ;pic18f4520.h: 183: unsigned PA1 :1;
[; ;pic18f4520.h: 184: };
[; ;pic18f4520.h: 185: struct {
[; ;pic18f4520.h: 186: unsigned :1;
[; ;pic18f4520.h: 187: unsigned PA2 :1;
[; ;pic18f4520.h: 188: };
[; ;pic18f4520.h: 189: } PORTCbits @ 0xF82;
[; ;pic18f4520.h: 192: extern volatile unsigned char PORTD @ 0xF83;
"194
[; ;pic18f4520.h: 194: asm("PORTD equ 0F83h");
[; <" PORTD equ 0F83h ;# ">
[; ;pic18f4520.h: 197: extern volatile union {
[; ;pic18f4520.h: 198: struct {
[; ;pic18f4520.h: 199: unsigned RD0 :1;
[; ;pic18f4520.h: 200: unsigned RD1 :1;
[; ;pic18f4520.h: 201: unsigned RD2 :1;
[; ;pic18f4520.h: 202: unsigned RD3 :1;
[; ;pic18f4520.h: 203: unsigned RD4 :1;
[; ;pic18f4520.h: 204: unsigned RD5 :1;
[; ;pic18f4520.h: 205: unsigned RD6 :1;
[; ;pic18f4520.h: 206: unsigned RD7 :1;
[; ;pic18f4520.h: 207: };
[; ;pic18f4520.h: 208: struct {
[; ;pic18f4520.h: 209: unsigned RD :8;
[; ;pic18f4520.h: 210: };
[; ;pic18f4520.h: 211: struct {
[; ;pic18f4520.h: 212: unsigned PSP0 :1;
[; ;pic18f4520.h: 213: unsigned PSP1 :1;
[; ;pic18f4520.h: 214: unsigned PSP2 :1;
[; ;pic18f4520.h: 215: unsigned PSP3 :1;
[; ;pic18f4520.h: 216: unsigned PSP4 :1;
[; ;pic18f4520.h: 217: unsigned PSP5 :1;
[; ;pic18f4520.h: 218: unsigned PSP6 :1;
[; ;pic18f4520.h: 219: unsigned PSP7 :1;
[; ;pic18f4520.h: 220: };
[; ;pic18f4520.h: 221: struct {
[; ;pic18f4520.h: 222: unsigned :5;
[; ;pic18f4520.h: 223: unsigned P1B :1;
[; ;pic18f4520.h: 224: unsigned P1C :1;
[; ;pic18f4520.h: 225: unsigned P1D :1;
[; ;pic18f4520.h: 226: };
[; ;pic18f4520.h: 227: struct {
[; ;pic18f4520.h: 228: unsigned :7;
[; ;pic18f4520.h: 229: unsigned SS2 :1;
[; ;pic18f4520.h: 230: };
[; ;pic18f4520.h: 231: } PORTDbits @ 0xF83;
[; ;pic18f4520.h: 234: extern volatile unsigned char PORTE @ 0xF84;
"236
[; ;pic18f4520.h: 236: asm("PORTE equ 0F84h");
[; <" PORTE equ 0F84h ;# ">
[; ;pic18f4520.h: 239: extern volatile union {
[; ;pic18f4520.h: 240: struct {
[; ;pic18f4520.h: 241: unsigned RE0 :1;
[; ;pic18f4520.h: 242: unsigned RE1 :1;
[; ;pic18f4520.h: 243: unsigned RE2 :1;
[; ;pic18f4520.h: 244: unsigned RE3 :1;
[; ;pic18f4520.h: 245: };
[; ;pic18f4520.h: 246: struct {
[; ;pic18f4520.h: 247: unsigned RE :8;
[; ;pic18f4520.h: 248: };
[; ;pic18f4520.h: 249: struct {
[; ;pic18f4520.h: 250: unsigned RD :1;
[; ;pic18f4520.h: 251: unsigned WR :1;
[; ;pic18f4520.h: 252: unsigned CS :1;
[; ;pic18f4520.h: 253: unsigned MCLR :1;
[; ;pic18f4520.h: 254: };
[; ;pic18f4520.h: 255: struct {
[; ;pic18f4520.h: 256: unsigned NOT_RD :1;
[; ;pic18f4520.h: 257: };
[; ;pic18f4520.h: 258: struct {
[; ;pic18f4520.h: 259: unsigned :1;
[; ;pic18f4520.h: 260: unsigned NOT_WR :1;
[; ;pic18f4520.h: 261: };
[; ;pic18f4520.h: 262: struct {
[; ;pic18f4520.h: 263: unsigned :2;
[; ;pic18f4520.h: 264: unsigned NOT_CS :1;
[; ;pic18f4520.h: 265: };
[; ;pic18f4520.h: 266: struct {
[; ;pic18f4520.h: 267: unsigned :3;
[; ;pic18f4520.h: 268: unsigned NOT_MCLR :1;
[; ;pic18f4520.h: 269: };
[; ;pic18f4520.h: 270: struct {
[; ;pic18f4520.h: 271: unsigned nRD :1;
[; ;pic18f4520.h: 272: unsigned nWR :1;
[; ;pic18f4520.h: 273: unsigned nCS :1;
[; ;pic18f4520.h: 274: unsigned nMCLR :1;
[; ;pic18f4520.h: 275: };
[; ;pic18f4520.h: 276: struct {
[; ;pic18f4520.h: 277: unsigned AN5 :1;
[; ;pic18f4520.h: 278: unsigned AN6 :1;
[; ;pic18f4520.h: 279: unsigned AN7 :1;
[; ;pic18f4520.h: 280: unsigned VPP :1;
[; ;pic18f4520.h: 281: };
[; ;pic18f4520.h: 282: struct {
[; ;pic18f4520.h: 283: unsigned :2;
[; ;pic18f4520.h: 284: unsigned CCP10 :1;
[; ;pic18f4520.h: 285: };
[; ;pic18f4520.h: 286: struct {
[; ;pic18f4520.h: 287: unsigned :7;
[; ;pic18f4520.h: 288: unsigned CCP2E :1;
[; ;pic18f4520.h: 289: };
[; ;pic18f4520.h: 290: struct {
[; ;pic18f4520.h: 291: unsigned :6;
[; ;pic18f4520.h: 292: unsigned CCP6E :1;
[; ;pic18f4520.h: 293: };
[; ;pic18f4520.h: 294: struct {
[; ;pic18f4520.h: 295: unsigned :5;
[; ;pic18f4520.h: 296: unsigned CCP7E :1;
[; ;pic18f4520.h: 297: };
[; ;pic18f4520.h: 298: struct {
[; ;pic18f4520.h: 299: unsigned :4;
[; ;pic18f4520.h: 300: unsigned CCP8E :1;
[; ;pic18f4520.h: 301: };
[; ;pic18f4520.h: 302: struct {
[; ;pic18f4520.h: 303: unsigned :3;
[; ;pic18f4520.h: 304: unsigned CCP9E :1;
[; ;pic18f4520.h: 305: };
[; ;pic18f4520.h: 306: struct {
[; ;pic18f4520.h: 307: unsigned :7;
[; ;pic18f4520.h: 308: unsigned PA2E :1;
[; ;pic18f4520.h: 309: };
[; ;pic18f4520.h: 310: struct {
[; ;pic18f4520.h: 311: unsigned :6;
[; ;pic18f4520.h: 312: unsigned PB1E :1;
[; ;pic18f4520.h: 313: };
[; ;pic18f4520.h: 314: struct {
[; ;pic18f4520.h: 315: unsigned :2;
[; ;pic18f4520.h: 316: unsigned PB2 :1;
[; ;pic18f4520.h: 317: };
[; ;pic18f4520.h: 318: struct {
[; ;pic18f4520.h: 319: unsigned :4;
[; ;pic18f4520.h: 320: unsigned PB3E :1;
[; ;pic18f4520.h: 321: };
[; ;pic18f4520.h: 322: struct {
[; ;pic18f4520.h: 323: unsigned :5;
[; ;pic18f4520.h: 324: unsigned PC1E :1;
[; ;pic18f4520.h: 325: };
[; ;pic18f4520.h: 326: struct {
[; ;pic18f4520.h: 327: unsigned :1;
[; ;pic18f4520.h: 328: unsigned PC2 :1;
[; ;pic18f4520.h: 329: };
[; ;pic18f4520.h: 330: struct {
[; ;pic18f4520.h: 331: unsigned :3;
[; ;pic18f4520.h: 332: unsigned PC3E :1;
[; ;pic18f4520.h: 333: };
[; ;pic18f4520.h: 334: struct {
[; ;pic18f4520.h: 335: unsigned PD2 :1;
[; ;pic18f4520.h: 336: };
[; ;pic18f4520.h: 337: struct {
[; ;pic18f4520.h: 338: unsigned RDE :1;
[; ;pic18f4520.h: 339: };
[; ;pic18f4520.h: 340: struct {
[; ;pic18f4520.h: 341: unsigned :4;
[; ;pic18f4520.h: 342: unsigned RE4 :1;
[; ;pic18f4520.h: 343: };
[; ;pic18f4520.h: 344: struct {
[; ;pic18f4520.h: 345: unsigned :5;
[; ;pic18f4520.h: 346: unsigned RE5 :1;
[; ;pic18f4520.h: 347: };
[; ;pic18f4520.h: 348: struct {
[; ;pic18f4520.h: 349: unsigned :6;
[; ;pic18f4520.h: 350: unsigned RE6 :1;
[; ;pic18f4520.h: 351: };
[; ;pic18f4520.h: 352: struct {
[; ;pic18f4520.h: 353: unsigned :7;
[; ;pic18f4520.h: 354: unsigned RE7 :1;
[; ;pic18f4520.h: 355: };
[; ;pic18f4520.h: 356: struct {
[; ;pic18f4520.h: 357: unsigned :1;
[; ;pic18f4520.h: 358: unsigned WRE :1;
[; ;pic18f4520.h: 359: };
[; ;pic18f4520.h: 360: } PORTEbits @ 0xF84;
[; ;pic18f4520.h: 363: extern volatile unsigned char LATA @ 0xF89;
"365
[; ;pic18f4520.h: 365: asm("LATA equ 0F89h");
[; <" LATA equ 0F89h ;# ">
[; ;pic18f4520.h: 368: extern volatile union {
[; ;pic18f4520.h: 369: struct {
[; ;pic18f4520.h: 370: unsigned LATA0 :1;
[; ;pic18f4520.h: 371: unsigned LATA1 :1;
[; ;pic18f4520.h: 372: unsigned LATA2 :1;
[; ;pic18f4520.h: 373: unsigned LATA3 :1;
[; ;pic18f4520.h: 374: unsigned LATA4 :1;
[; ;pic18f4520.h: 375: unsigned LATA5 :1;
[; ;pic18f4520.h: 376: unsigned LATA6 :1;
[; ;pic18f4520.h: 377: unsigned LATA7 :1;
[; ;pic18f4520.h: 378: };
[; ;pic18f4520.h: 379: struct {
[; ;pic18f4520.h: 380: unsigned LATA :8;
[; ;pic18f4520.h: 381: };
[; ;pic18f4520.h: 382: struct {
[; ;pic18f4520.h: 383: unsigned LA0 :1;
[; ;pic18f4520.h: 384: };
[; ;pic18f4520.h: 385: struct {
[; ;pic18f4520.h: 386: unsigned :1;
[; ;pic18f4520.h: 387: unsigned LA1 :1;
[; ;pic18f4520.h: 388: };
[; ;pic18f4520.h: 389: struct {
[; ;pic18f4520.h: 390: unsigned :2;
[; ;pic18f4520.h: 391: unsigned LA2 :1;
[; ;pic18f4520.h: 392: };
[; ;pic18f4520.h: 393: struct {
[; ;pic18f4520.h: 394: unsigned :3;
[; ;pic18f4520.h: 395: unsigned LA3 :1;
[; ;pic18f4520.h: 396: };
[; ;pic18f4520.h: 397: struct {
[; ;pic18f4520.h: 398: unsigned :4;
[; ;pic18f4520.h: 399: unsigned LA4 :1;
[; ;pic18f4520.h: 400: };
[; ;pic18f4520.h: 401: struct {
[; ;pic18f4520.h: 402: unsigned :5;
[; ;pic18f4520.h: 403: unsigned LA5 :1;
[; ;pic18f4520.h: 404: };
[; ;pic18f4520.h: 405: struct {
[; ;pic18f4520.h: 406: unsigned :6;
[; ;pic18f4520.h: 407: unsigned LA6 :1;
[; ;pic18f4520.h: 408: };
[; ;pic18f4520.h: 409: struct {
[; ;pic18f4520.h: 410: unsigned :7;
[; ;pic18f4520.h: 411: unsigned LA7 :1;
[; ;pic18f4520.h: 412: };
[; ;pic18f4520.h: 413: } LATAbits @ 0xF89;
[; ;pic18f4520.h: 416: extern volatile unsigned char LATB @ 0xF8A;
"418
[; ;pic18f4520.h: 418: asm("LATB equ 0F8Ah");
[; <" LATB equ 0F8Ah ;# ">
[; ;pic18f4520.h: 421: extern volatile union {
[; ;pic18f4520.h: 422: struct {
[; ;pic18f4520.h: 423: unsigned LATB0 :1;
[; ;pic18f4520.h: 424: unsigned LATB1 :1;
[; ;pic18f4520.h: 425: unsigned LATB2 :1;
[; ;pic18f4520.h: 426: unsigned LATB3 :1;
[; ;pic18f4520.h: 427: unsigned LATB4 :1;
[; ;pic18f4520.h: 428: unsigned LATB5 :1;
[; ;pic18f4520.h: 429: unsigned LATB6 :1;
[; ;pic18f4520.h: 430: unsigned LATB7 :1;
[; ;pic18f4520.h: 431: };
[; ;pic18f4520.h: 432: struct {
[; ;pic18f4520.h: 433: unsigned LATB :8;
[; ;pic18f4520.h: 434: };
[; ;pic18f4520.h: 435: struct {
[; ;pic18f4520.h: 436: unsigned LB0 :1;
[; ;pic18f4520.h: 437: };
[; ;pic18f4520.h: 438: struct {
[; ;pic18f4520.h: 439: unsigned :1;
[; ;pic18f4520.h: 440: unsigned LB1 :1;
[; ;pic18f4520.h: 441: };
[; ;pic18f4520.h: 442: struct {
[; ;pic18f4520.h: 443: unsigned :2;
[; ;pic18f4520.h: 444: unsigned LB2 :1;
[; ;pic18f4520.h: 445: };
[; ;pic18f4520.h: 446: struct {
[; ;pic18f4520.h: 447: unsigned :3;
[; ;pic18f4520.h: 448: unsigned LB3 :1;
[; ;pic18f4520.h: 449: };
[; ;pic18f4520.h: 450: struct {
[; ;pic18f4520.h: 451: unsigned :4;
[; ;pic18f4520.h: 452: unsigned LB4 :1;
[; ;pic18f4520.h: 453: };
[; ;pic18f4520.h: 454: struct {
[; ;pic18f4520.h: 455: unsigned :5;
[; ;pic18f4520.h: 456: unsigned LB5 :1;
[; ;pic18f4520.h: 457: };
[; ;pic18f4520.h: 458: struct {
[; ;pic18f4520.h: 459: unsigned :6;
[; ;pic18f4520.h: 460: unsigned LB6 :1;
[; ;pic18f4520.h: 461: };
[; ;pic18f4520.h: 462: struct {
[; ;pic18f4520.h: 463: unsigned :7;
[; ;pic18f4520.h: 464: unsigned LB7 :1;
[; ;pic18f4520.h: 465: };
[; ;pic18f4520.h: 466: } LATBbits @ 0xF8A;
[; ;pic18f4520.h: 469: extern volatile unsigned char LATC @ 0xF8B;
"471
[; ;pic18f4520.h: 471: asm("LATC equ 0F8Bh");
[; <" LATC equ 0F8Bh ;# ">
[; ;pic18f4520.h: 474: extern volatile union {
[; ;pic18f4520.h: 475: struct {
[; ;pic18f4520.h: 476: unsigned LATC0 :1;
[; ;pic18f4520.h: 477: unsigned LATC1 :1;
[; ;pic18f4520.h: 478: unsigned LATC2 :1;
[; ;pic18f4520.h: 479: unsigned LATC3 :1;
[; ;pic18f4520.h: 480: unsigned LATC4 :1;
[; ;pic18f4520.h: 481: unsigned LATC5 :1;
[; ;pic18f4520.h: 482: unsigned LATC6 :1;
[; ;pic18f4520.h: 483: unsigned LATC7 :1;
[; ;pic18f4520.h: 484: };
[; ;pic18f4520.h: 485: struct {
[; ;pic18f4520.h: 486: unsigned LATC :8;
[; ;pic18f4520.h: 487: };
[; ;pic18f4520.h: 488: struct {
[; ;pic18f4520.h: 489: unsigned LC0 :1;
[; ;pic18f4520.h: 490: };
[; ;pic18f4520.h: 491: struct {
[; ;pic18f4520.h: 492: unsigned :1;
[; ;pic18f4520.h: 493: unsigned LC1 :1;
[; ;pic18f4520.h: 494: };
[; ;pic18f4520.h: 495: struct {
[; ;pic18f4520.h: 496: unsigned :2;
[; ;pic18f4520.h: 497: unsigned LC2 :1;
[; ;pic18f4520.h: 498: };
[; ;pic18f4520.h: 499: struct {
[; ;pic18f4520.h: 500: unsigned :3;
[; ;pic18f4520.h: 501: unsigned LC3 :1;
[; ;pic18f4520.h: 502: };
[; ;pic18f4520.h: 503: struct {
[; ;pic18f4520.h: 504: unsigned :4;
[; ;pic18f4520.h: 505: unsigned LC4 :1;
[; ;pic18f4520.h: 506: };
[; ;pic18f4520.h: 507: struct {
[; ;pic18f4520.h: 508: unsigned :5;
[; ;pic18f4520.h: 509: unsigned LC5 :1;
[; ;pic18f4520.h: 510: };
[; ;pic18f4520.h: 511: struct {
[; ;pic18f4520.h: 512: unsigned :6;
[; ;pic18f4520.h: 513: unsigned LC6 :1;
[; ;pic18f4520.h: 514: };
[; ;pic18f4520.h: 515: struct {
[; ;pic18f4520.h: 516: unsigned :7;
[; ;pic18f4520.h: 517: unsigned LC7 :1;
[; ;pic18f4520.h: 518: };
[; ;pic18f4520.h: 519: } LATCbits @ 0xF8B;
[; ;pic18f4520.h: 522: extern volatile unsigned char LATD @ 0xF8C;
"524
[; ;pic18f4520.h: 524: asm("LATD equ 0F8Ch");
[; <" LATD equ 0F8Ch ;# ">
[; ;pic18f4520.h: 527: extern volatile union {
[; ;pic18f4520.h: 528: struct {
[; ;pic18f4520.h: 529: unsigned LATD0 :1;
[; ;pic18f4520.h: 530: unsigned LATD1 :1;
[; ;pic18f4520.h: 531: unsigned LATD2 :1;
[; ;pic18f4520.h: 532: unsigned LATD3 :1;
[; ;pic18f4520.h: 533: unsigned LATD4 :1;
[; ;pic18f4520.h: 534: unsigned LATD5 :1;
[; ;pic18f4520.h: 535: unsigned LATD6 :1;
[; ;pic18f4520.h: 536: unsigned LATD7 :1;
[; ;pic18f4520.h: 537: };
[; ;pic18f4520.h: 538: struct {
[; ;pic18f4520.h: 539: unsigned LATD :8;
[; ;pic18f4520.h: 540: };
[; ;pic18f4520.h: 541: struct {
[; ;pic18f4520.h: 542: unsigned LD0 :1;
[; ;pic18f4520.h: 543: };
[; ;pic18f4520.h: 544: struct {
[; ;pic18f4520.h: 545: unsigned :1;
[; ;pic18f4520.h: 546: unsigned LD1 :1;
[; ;pic18f4520.h: 547: };
[; ;pic18f4520.h: 548: struct {
[; ;pic18f4520.h: 549: unsigned :2;
[; ;pic18f4520.h: 550: unsigned LD2 :1;
[; ;pic18f4520.h: 551: };
[; ;pic18f4520.h: 552: struct {
[; ;pic18f4520.h: 553: unsigned :3;
[; ;pic18f4520.h: 554: unsigned LD3 :1;
[; ;pic18f4520.h: 555: };
[; ;pic18f4520.h: 556: struct {
[; ;pic18f4520.h: 557: unsigned :4;
[; ;pic18f4520.h: 558: unsigned LD4 :1;
[; ;pic18f4520.h: 559: };
[; ;pic18f4520.h: 560: struct {
[; ;pic18f4520.h: 561: unsigned :5;
[; ;pic18f4520.h: 562: unsigned LD5 :1;
[; ;pic18f4520.h: 563: };
[; ;pic18f4520.h: 564: struct {
[; ;pic18f4520.h: 565: unsigned :6;
[; ;pic18f4520.h: 566: unsigned LD6 :1;
[; ;pic18f4520.h: 567: };
[; ;pic18f4520.h: 568: struct {
[; ;pic18f4520.h: 569: unsigned :7;
[; ;pic18f4520.h: 570: unsigned LD7 :1;
[; ;pic18f4520.h: 571: };
[; ;pic18f4520.h: 572: } LATDbits @ 0xF8C;
[; ;pic18f4520.h: 575: extern volatile unsigned char LATE @ 0xF8D;
"577
[; ;pic18f4520.h: 577: asm("LATE equ 0F8Dh");
[; <" LATE equ 0F8Dh ;# ">
[; ;pic18f4520.h: 580: extern volatile union {
[; ;pic18f4520.h: 581: struct {
[; ;pic18f4520.h: 582: unsigned LATE0 :1;
[; ;pic18f4520.h: 583: unsigned LATE1 :1;
[; ;pic18f4520.h: 584: unsigned LATE2 :1;
[; ;pic18f4520.h: 585: };
[; ;pic18f4520.h: 586: struct {
[; ;pic18f4520.h: 587: unsigned LATE :8;
[; ;pic18f4520.h: 588: };
[; ;pic18f4520.h: 589: struct {
[; ;pic18f4520.h: 590: unsigned LE0 :1;
[; ;pic18f4520.h: 591: };
[; ;pic18f4520.h: 592: struct {
[; ;pic18f4520.h: 593: unsigned :1;
[; ;pic18f4520.h: 594: unsigned LE1 :1;
[; ;pic18f4520.h: 595: };
[; ;pic18f4520.h: 596: struct {
[; ;pic18f4520.h: 597: unsigned :2;
[; ;pic18f4520.h: 598: unsigned LE2 :1;
[; ;pic18f4520.h: 599: };
[; ;pic18f4520.h: 600: struct {
[; ;pic18f4520.h: 601: unsigned :3;
[; ;pic18f4520.h: 602: unsigned LE3 :1;
[; ;pic18f4520.h: 603: };
[; ;pic18f4520.h: 604: struct {
[; ;pic18f4520.h: 605: unsigned :4;
[; ;pic18f4520.h: 606: unsigned LE4 :1;
[; ;pic18f4520.h: 607: };
[; ;pic18f4520.h: 608: struct {
[; ;pic18f4520.h: 609: unsigned :5;
[; ;pic18f4520.h: 610: unsigned LE5 :1;
[; ;pic18f4520.h: 611: };
[; ;pic18f4520.h: 612: struct {
[; ;pic18f4520.h: 613: unsigned :6;
[; ;pic18f4520.h: 614: unsigned LE6 :1;
[; ;pic18f4520.h: 615: };
[; ;pic18f4520.h: 616: struct {
[; ;pic18f4520.h: 617: unsigned :7;
[; ;pic18f4520.h: 618: unsigned LE7 :1;
[; ;pic18f4520.h: 619: };
[; ;pic18f4520.h: 620: } LATEbits @ 0xF8D;
[; ;pic18f4520.h: 623: extern volatile unsigned char TRISA @ 0xF92;
"625
[; ;pic18f4520.h: 625: asm("TRISA equ 0F92h");
[; <" TRISA equ 0F92h ;# ">
[; ;pic18f4520.h: 628: extern volatile unsigned char DDRA @ 0xF92;
"630
[; ;pic18f4520.h: 630: asm("DDRA equ 0F92h");
[; <" DDRA equ 0F92h ;# ">
[; ;pic18f4520.h: 633: extern volatile union {
[; ;pic18f4520.h: 634: struct {
[; ;pic18f4520.h: 635: unsigned TRISA0 :1;
[; ;pic18f4520.h: 636: unsigned TRISA1 :1;
[; ;pic18f4520.h: 637: unsigned TRISA2 :1;
[; ;pic18f4520.h: 638: unsigned TRISA3 :1;
[; ;pic18f4520.h: 639: unsigned TRISA4 :1;
[; ;pic18f4520.h: 640: unsigned TRISA5 :1;
[; ;pic18f4520.h: 641: unsigned TRISA6 :1;
[; ;pic18f4520.h: 642: unsigned TRISA7 :1;
[; ;pic18f4520.h: 643: };
[; ;pic18f4520.h: 644: struct {
[; ;pic18f4520.h: 645: unsigned TRISA :8;
[; ;pic18f4520.h: 646: };
[; ;pic18f4520.h: 647: struct {
[; ;pic18f4520.h: 648: unsigned RA0 :1;
[; ;pic18f4520.h: 649: unsigned RA1 :1;
[; ;pic18f4520.h: 650: unsigned RA2 :1;
[; ;pic18f4520.h: 651: unsigned RA3 :1;
[; ;pic18f4520.h: 652: unsigned RA4 :1;
[; ;pic18f4520.h: 653: unsigned RA5 :1;
[; ;pic18f4520.h: 654: unsigned RA6 :1;
[; ;pic18f4520.h: 655: unsigned RA7 :1;
[; ;pic18f4520.h: 656: };
[; ;pic18f4520.h: 657: } TRISAbits @ 0xF92;
[; ;pic18f4520.h: 659: extern volatile union {
[; ;pic18f4520.h: 660: struct {
[; ;pic18f4520.h: 661: unsigned TRISA0 :1;
[; ;pic18f4520.h: 662: unsigned TRISA1 :1;
[; ;pic18f4520.h: 663: unsigned TRISA2 :1;
[; ;pic18f4520.h: 664: unsigned TRISA3 :1;
[; ;pic18f4520.h: 665: unsigned TRISA4 :1;
[; ;pic18f4520.h: 666: unsigned TRISA5 :1;
[; ;pic18f4520.h: 667: unsigned TRISA6 :1;
[; ;pic18f4520.h: 668: unsigned TRISA7 :1;
[; ;pic18f4520.h: 669: };
[; ;pic18f4520.h: 670: struct {
[; ;pic18f4520.h: 671: unsigned TRISA :8;
[; ;pic18f4520.h: 672: };
[; ;pic18f4520.h: 673: struct {
[; ;pic18f4520.h: 674: unsigned RA0 :1;
[; ;pic18f4520.h: 675: unsigned RA1 :1;
[; ;pic18f4520.h: 676: unsigned RA2 :1;
[; ;pic18f4520.h: 677: unsigned RA3 :1;
[; ;pic18f4520.h: 678: unsigned RA4 :1;
[; ;pic18f4520.h: 679: unsigned RA5 :1;
[; ;pic18f4520.h: 680: unsigned RA6 :1;
[; ;pic18f4520.h: 681: unsigned RA7 :1;
[; ;pic18f4520.h: 682: };
[; ;pic18f4520.h: 683: } DDRAbits @ 0xF92;
[; ;pic18f4520.h: 686: extern volatile unsigned char TRISB @ 0xF93;
"688
[; ;pic18f4520.h: 688: asm("TRISB equ 0F93h");
[; <" TRISB equ 0F93h ;# ">
[; ;pic18f4520.h: 691: extern volatile unsigned char DDRB @ 0xF93;
"693
[; ;pic18f4520.h: 693: asm("DDRB equ 0F93h");
[; <" DDRB equ 0F93h ;# ">
[; ;pic18f4520.h: 696: extern volatile union {
[; ;pic18f4520.h: 697: struct {
[; ;pic18f4520.h: 698: unsigned TRISB0 :1;
[; ;pic18f4520.h: 699: unsigned TRISB1 :1;
[; ;pic18f4520.h: 700: unsigned TRISB2 :1;
[; ;pic18f4520.h: 701: unsigned TRISB3 :1;
[; ;pic18f4520.h: 702: unsigned TRISB4 :1;
[; ;pic18f4520.h: 703: unsigned TRISB5 :1;
[; ;pic18f4520.h: 704: unsigned TRISB6 :1;
[; ;pic18f4520.h: 705: unsigned TRISB7 :1;
[; ;pic18f4520.h: 706: };
[; ;pic18f4520.h: 707: struct {
[; ;pic18f4520.h: 708: unsigned TRISB :8;
[; ;pic18f4520.h: 709: };
[; ;pic18f4520.h: 710: struct {
[; ;pic18f4520.h: 711: unsigned RB0 :1;
[; ;pic18f4520.h: 712: unsigned RB1 :1;
[; ;pic18f4520.h: 713: unsigned RB2 :1;
[; ;pic18f4520.h: 714: unsigned RB3 :1;
[; ;pic18f4520.h: 715: unsigned RB4 :1;
[; ;pic18f4520.h: 716: unsigned RB5 :1;
[; ;pic18f4520.h: 717: unsigned RB6 :1;
[; ;pic18f4520.h: 718: unsigned RB7 :1;
[; ;pic18f4520.h: 719: };
[; ;pic18f4520.h: 720: } TRISBbits @ 0xF93;
[; ;pic18f4520.h: 722: extern volatile union {
[; ;pic18f4520.h: 723: struct {
[; ;pic18f4520.h: 724: unsigned TRISB0 :1;
[; ;pic18f4520.h: 725: unsigned TRISB1 :1;
[; ;pic18f4520.h: 726: unsigned TRISB2 :1;
[; ;pic18f4520.h: 727: unsigned TRISB3 :1;
[; ;pic18f4520.h: 728: unsigned TRISB4 :1;
[; ;pic18f4520.h: 729: unsigned TRISB5 :1;
[; ;pic18f4520.h: 730: unsigned TRISB6 :1;
[; ;pic18f4520.h: 731: unsigned TRISB7 :1;
[; ;pic18f4520.h: 732: };
[; ;pic18f4520.h: 733: struct {
[; ;pic18f4520.h: 734: unsigned TRISB :8;
[; ;pic18f4520.h: 735: };
[; ;pic18f4520.h: 736: struct {
[; ;pic18f4520.h: 737: unsigned RB0 :1;
[; ;pic18f4520.h: 738: unsigned RB1 :1;
[; ;pic18f4520.h: 739: unsigned RB2 :1;
[; ;pic18f4520.h: 740: unsigned RB3 :1;
[; ;pic18f4520.h: 741: unsigned RB4 :1;
[; ;pic18f4520.h: 742: unsigned RB5 :1;
[; ;pic18f4520.h: 743: unsigned RB6 :1;
[; ;pic18f4520.h: 744: unsigned RB7 :1;
[; ;pic18f4520.h: 745: };
[; ;pic18f4520.h: 746: } DDRBbits @ 0xF93;
[; ;pic18f4520.h: 749: extern volatile unsigned char TRISC @ 0xF94;
"751
[; ;pic18f4520.h: 751: asm("TRISC equ 0F94h");
[; <" TRISC equ 0F94h ;# ">
[; ;pic18f4520.h: 754: extern volatile unsigned char DDRC @ 0xF94;
"756
[; ;pic18f4520.h: 756: asm("DDRC equ 0F94h");
[; <" DDRC equ 0F94h ;# ">
[; ;pic18f4520.h: 759: extern volatile union {
[; ;pic18f4520.h: 760: struct {
[; ;pic18f4520.h: 761: unsigned TRISC0 :1;
[; ;pic18f4520.h: 762: unsigned TRISC1 :1;
[; ;pic18f4520.h: 763: unsigned TRISC2 :1;
[; ;pic18f4520.h: 764: unsigned TRISC3 :1;
[; ;pic18f4520.h: 765: unsigned TRISC4 :1;
[; ;pic18f4520.h: 766: unsigned TRISC5 :1;
[; ;pic18f4520.h: 767: unsigned TRISC6 :1;
[; ;pic18f4520.h: 768: unsigned TRISC7 :1;
[; ;pic18f4520.h: 769: };
[; ;pic18f4520.h: 770: struct {
[; ;pic18f4520.h: 771: unsigned TRISC :8;
[; ;pic18f4520.h: 772: };
[; ;pic18f4520.h: 773: struct {
[; ;pic18f4520.h: 774: unsigned RC0 :1;
[; ;pic18f4520.h: 775: unsigned RC1 :1;
[; ;pic18f4520.h: 776: unsigned RC2 :1;
[; ;pic18f4520.h: 777: unsigned RC3 :1;
[; ;pic18f4520.h: 778: unsigned RC4 :1;
[; ;pic18f4520.h: 779: unsigned RC5 :1;
[; ;pic18f4520.h: 780: unsigned RC6 :1;
[; ;pic18f4520.h: 781: unsigned RC7 :1;
[; ;pic18f4520.h: 782: };
[; ;pic18f4520.h: 783: } TRISCbits @ 0xF94;
[; ;pic18f4520.h: 785: extern volatile union {
[; ;pic18f4520.h: 786: struct {
[; ;pic18f4520.h: 787: unsigned TRISC0 :1;
[; ;pic18f4520.h: 788: unsigned TRISC1 :1;
[; ;pic18f4520.h: 789: unsigned TRISC2 :1;
[; ;pic18f4520.h: 790: unsigned TRISC3 :1;
[; ;pic18f4520.h: 791: unsigned TRISC4 :1;
[; ;pic18f4520.h: 792: unsigned TRISC5 :1;
[; ;pic18f4520.h: 793: unsigned TRISC6 :1;
[; ;pic18f4520.h: 794: unsigned TRISC7 :1;
[; ;pic18f4520.h: 795: };
[; ;pic18f4520.h: 796: struct {
[; ;pic18f4520.h: 797: unsigned TRISC :8;
[; ;pic18f4520.h: 798: };
[; ;pic18f4520.h: 799: struct {
[; ;pic18f4520.h: 800: unsigned RC0 :1;
[; ;pic18f4520.h: 801: unsigned RC1 :1;
[; ;pic18f4520.h: 802: unsigned RC2 :1;
[; ;pic18f4520.h: 803: unsigned RC3 :1;
[; ;pic18f4520.h: 804: unsigned RC4 :1;
[; ;pic18f4520.h: 805: unsigned RC5 :1;
[; ;pic18f4520.h: 806: unsigned RC6 :1;
[; ;pic18f4520.h: 807: unsigned RC7 :1;
[; ;pic18f4520.h: 808: };
[; ;pic18f4520.h: 809: } DDRCbits @ 0xF94;
[; ;pic18f4520.h: 812: extern volatile unsigned char TRISD @ 0xF95;
"814
[; ;pic18f4520.h: 814: asm("TRISD equ 0F95h");
[; <" TRISD equ 0F95h ;# ">
[; ;pic18f4520.h: 817: extern volatile unsigned char DDRD @ 0xF95;
"819
[; ;pic18f4520.h: 819: asm("DDRD equ 0F95h");
[; <" DDRD equ 0F95h ;# ">
[; ;pic18f4520.h: 822: extern volatile union {
[; ;pic18f4520.h: 823: struct {
[; ;pic18f4520.h: 824: unsigned TRISD0 :1;
[; ;pic18f4520.h: 825: unsigned TRISD1 :1;
[; ;pic18f4520.h: 826: unsigned TRISD2 :1;
[; ;pic18f4520.h: 827: unsigned TRISD3 :1;
[; ;pic18f4520.h: 828: unsigned TRISD4 :1;
[; ;pic18f4520.h: 829: unsigned TRISD5 :1;
[; ;pic18f4520.h: 830: unsigned TRISD6 :1;
[; ;pic18f4520.h: 831: unsigned TRISD7 :1;
[; ;pic18f4520.h: 832: };
[; ;pic18f4520.h: 833: struct {
[; ;pic18f4520.h: 834: unsigned TRISD :8;
[; ;pic18f4520.h: 835: };
[; ;pic18f4520.h: 836: struct {
[; ;pic18f4520.h: 837: unsigned RD0 :1;
[; ;pic18f4520.h: 838: unsigned RD1 :1;
[; ;pic18f4520.h: 839: unsigned RD2 :1;
[; ;pic18f4520.h: 840: unsigned RD3 :1;
[; ;pic18f4520.h: 841: unsigned RD4 :1;
[; ;pic18f4520.h: 842: unsigned RD5 :1;
[; ;pic18f4520.h: 843: unsigned RD6 :1;
[; ;pic18f4520.h: 844: unsigned RD7 :1;
[; ;pic18f4520.h: 845: };
[; ;pic18f4520.h: 846: } TRISDbits @ 0xF95;
[; ;pic18f4520.h: 848: extern volatile union {
[; ;pic18f4520.h: 849: struct {
[; ;pic18f4520.h: 850: unsigned TRISD0 :1;
[; ;pic18f4520.h: 851: unsigned TRISD1 :1;
[; ;pic18f4520.h: 852: unsigned TRISD2 :1;
[; ;pic18f4520.h: 853: unsigned TRISD3 :1;
[; ;pic18f4520.h: 854: unsigned TRISD4 :1;
[; ;pic18f4520.h: 855: unsigned TRISD5 :1;
[; ;pic18f4520.h: 856: unsigned TRISD6 :1;
[; ;pic18f4520.h: 857: unsigned TRISD7 :1;
[; ;pic18f4520.h: 858: };
[; ;pic18f4520.h: 859: struct {
[; ;pic18f4520.h: 860: unsigned TRISD :8;
[; ;pic18f4520.h: 861: };
[; ;pic18f4520.h: 862: struct {
[; ;pic18f4520.h: 863: unsigned RD0 :1;
[; ;pic18f4520.h: 864: unsigned RD1 :1;
[; ;pic18f4520.h: 865: unsigned RD2 :1;
[; ;pic18f4520.h: 866: unsigned RD3 :1;
[; ;pic18f4520.h: 867: unsigned RD4 :1;
[; ;pic18f4520.h: 868: unsigned RD5 :1;
[; ;pic18f4520.h: 869: unsigned RD6 :1;
[; ;pic18f4520.h: 870: unsigned RD7 :1;
[; ;pic18f4520.h: 871: };
[; ;pic18f4520.h: 872: } DDRDbits @ 0xF95;
[; ;pic18f4520.h: 875: extern volatile unsigned char TRISE @ 0xF96;
"877
[; ;pic18f4520.h: 877: asm("TRISE equ 0F96h");
[; <" TRISE equ 0F96h ;# ">
[; ;pic18f4520.h: 880: extern volatile unsigned char DDRE @ 0xF96;
"882
[; ;pic18f4520.h: 882: asm("DDRE equ 0F96h");
[; <" DDRE equ 0F96h ;# ">
[; ;pic18f4520.h: 885: extern volatile union {
[; ;pic18f4520.h: 886: struct {
[; ;pic18f4520.h: 887: unsigned TRISE0 :1;
[; ;pic18f4520.h: 888: unsigned TRISE1 :1;
[; ;pic18f4520.h: 889: unsigned TRISE2 :1;
[; ;pic18f4520.h: 890: unsigned :1;
[; ;pic18f4520.h: 891: unsigned PSPMODE :1;
[; ;pic18f4520.h: 892: unsigned IBOV :1;
[; ;pic18f4520.h: 893: unsigned OBF :1;
[; ;pic18f4520.h: 894: unsigned IBF :1;
[; ;pic18f4520.h: 895: };
[; ;pic18f4520.h: 896: struct {
[; ;pic18f4520.h: 897: unsigned TRISE :8;
[; ;pic18f4520.h: 898: };
[; ;pic18f4520.h: 899: struct {
[; ;pic18f4520.h: 900: unsigned RE0 :1;
[; ;pic18f4520.h: 901: unsigned RE1 :1;
[; ;pic18f4520.h: 902: unsigned RE2 :1;
[; ;pic18f4520.h: 903: unsigned RE3 :1;
[; ;pic18f4520.h: 904: };
[; ;pic18f4520.h: 905: } TRISEbits @ 0xF96;
[; ;pic18f4520.h: 907: extern volatile union {
[; ;pic18f4520.h: 908: struct {
[; ;pic18f4520.h: 909: unsigned TRISE0 :1;
[; ;pic18f4520.h: 910: unsigned TRISE1 :1;
[; ;pic18f4520.h: 911: unsigned TRISE2 :1;
[; ;pic18f4520.h: 912: unsigned :1;
[; ;pic18f4520.h: 913: unsigned PSPMODE :1;
[; ;pic18f4520.h: 914: unsigned IBOV :1;
[; ;pic18f4520.h: 915: unsigned OBF :1;
[; ;pic18f4520.h: 916: unsigned IBF :1;
[; ;pic18f4520.h: 917: };
[; ;pic18f4520.h: 918: struct {
[; ;pic18f4520.h: 919: unsigned TRISE :8;
[; ;pic18f4520.h: 920: };
[; ;pic18f4520.h: 921: struct {
[; ;pic18f4520.h: 922: unsigned RE0 :1;
[; ;pic18f4520.h: 923: unsigned RE1 :1;
[; ;pic18f4520.h: 924: unsigned RE2 :1;
[; ;pic18f4520.h: 925: unsigned RE3 :1;
[; ;pic18f4520.h: 926: };
[; ;pic18f4520.h: 927: } DDREbits @ 0xF96;
[; ;pic18f4520.h: 930: extern volatile unsigned char OSCTUNE @ 0xF9B;
"932
[; ;pic18f4520.h: 932: asm("OSCTUNE equ 0F9Bh");
[; <" OSCTUNE equ 0F9Bh ;# ">
[; ;pic18f4520.h: 935: extern volatile union {
[; ;pic18f4520.h: 936: struct {
[; ;pic18f4520.h: 937: unsigned TUN :5;
[; ;pic18f4520.h: 938: unsigned :1;
[; ;pic18f4520.h: 939: unsigned PLLEN :1;
[; ;pic18f4520.h: 940: unsigned INTSRC :1;
[; ;pic18f4520.h: 941: };
[; ;pic18f4520.h: 942: struct {
[; ;pic18f4520.h: 943: unsigned TUN0 :1;
[; ;pic18f4520.h: 944: unsigned TUN1 :1;
[; ;pic18f4520.h: 945: unsigned TUN2 :1;
[; ;pic18f4520.h: 946: unsigned TUN3 :1;
[; ;pic18f4520.h: 947: unsigned TUN4 :1;
[; ;pic18f4520.h: 948: };
[; ;pic18f4520.h: 949: } OSCTUNEbits @ 0xF9B;
[; ;pic18f4520.h: 952: extern volatile unsigned char PIE1 @ 0xF9D;
"954
[; ;pic18f4520.h: 954: asm("PIE1 equ 0F9Dh");
[; <" PIE1 equ 0F9Dh ;# ">
[; ;pic18f4520.h: 957: extern volatile union {
[; ;pic18f4520.h: 958: struct {
[; ;pic18f4520.h: 959: unsigned TMR1IE :1;
[; ;pic18f4520.h: 960: unsigned TMR2IE :1;
[; ;pic18f4520.h: 961: unsigned CCP1IE :1;
[; ;pic18f4520.h: 962: unsigned SSPIE :1;
[; ;pic18f4520.h: 963: unsigned TXIE :1;
[; ;pic18f4520.h: 964: unsigned RCIE :1;
[; ;pic18f4520.h: 965: unsigned ADIE :1;
[; ;pic18f4520.h: 966: unsigned PSPIE :1;
[; ;pic18f4520.h: 967: };
[; ;pic18f4520.h: 968: struct {
[; ;pic18f4520.h: 969: unsigned :5;
[; ;pic18f4520.h: 970: unsigned RC1IE :1;
[; ;pic18f4520.h: 971: };
[; ;pic18f4520.h: 972: struct {
[; ;pic18f4520.h: 973: unsigned :4;
[; ;pic18f4520.h: 974: unsigned TX1IE :1;
[; ;pic18f4520.h: 975: };
[; ;pic18f4520.h: 976: } PIE1bits @ 0xF9D;
[; ;pic18f4520.h: 979: extern volatile unsigned char PIR1 @ 0xF9E;
"981
[; ;pic18f4520.h: 981: asm("PIR1 equ 0F9Eh");
[; <" PIR1 equ 0F9Eh ;# ">
[; ;pic18f4520.h: 984: extern volatile union {
[; ;pic18f4520.h: 985: struct {
[; ;pic18f4520.h: 986: unsigned TMR1IF :1;
[; ;pic18f4520.h: 987: unsigned TMR2IF :1;
[; ;pic18f4520.h: 988: unsigned CCP1IF :1;
[; ;pic18f4520.h: 989: unsigned SSPIF :1;
[; ;pic18f4520.h: 990: unsigned TXIF :1;
[; ;pic18f4520.h: 991: unsigned RCIF :1;
[; ;pic18f4520.h: 992: unsigned ADIF :1;
[; ;pic18f4520.h: 993: unsigned PSPIF :1;
[; ;pic18f4520.h: 994: };
[; ;pic18f4520.h: 995: struct {
[; ;pic18f4520.h: 996: unsigned TMR1IF :1;
[; ;pic18f4520.h: 997: unsigned TMR2IF :1;
[; ;pic18f4520.h: 998: unsigned CCP1IF :1;
[; ;pic18f4520.h: 999: unsigned SSPIF :1;
[; ;pic18f4520.h: 1000: unsigned :2;
[; ;pic18f4520.h: 1001: unsigned ADIF :1;
[; ;pic18f4520.h: 1002: unsigned PSPIF :1;
[; ;pic18f4520.h: 1003: };
[; ;pic18f4520.h: 1004: struct {
[; ;pic18f4520.h: 1005: unsigned :5;
[; ;pic18f4520.h: 1006: unsigned RC1IF :1;
[; ;pic18f4520.h: 1007: };
[; ;pic18f4520.h: 1008: struct {
[; ;pic18f4520.h: 1009: unsigned :4;
[; ;pic18f4520.h: 1010: unsigned TX1IF :1;
[; ;pic18f4520.h: 1011: };
[; ;pic18f4520.h: 1012: } PIR1bits @ 0xF9E;
[; ;pic18f4520.h: 1015: extern volatile unsigned char IPR1 @ 0xF9F;
"1017
[; ;pic18f4520.h: 1017: asm("IPR1 equ 0F9Fh");
[; <" IPR1 equ 0F9Fh ;# ">
[; ;pic18f4520.h: 1020: extern volatile union {
[; ;pic18f4520.h: 1021: struct {
[; ;pic18f4520.h: 1022: unsigned TMR1IP :1;
[; ;pic18f4520.h: 1023: unsigned TMR2IP :1;
[; ;pic18f4520.h: 1024: unsigned CCP1IP :1;
[; ;pic18f4520.h: 1025: unsigned SSPIP :1;
[; ;pic18f4520.h: 1026: unsigned TXIP :1;
[; ;pic18f4520.h: 1027: unsigned RCIP :1;
[; ;pic18f4520.h: 1028: unsigned ADIP :1;
[; ;pic18f4520.h: 1029: unsigned PSPIP :1;
[; ;pic18f4520.h: 1030: };
[; ;pic18f4520.h: 1031: struct {
[; ;pic18f4520.h: 1032: unsigned :5;
[; ;pic18f4520.h: 1033: unsigned RC1IP :1;
[; ;pic18f4520.h: 1034: };
[; ;pic18f4520.h: 1035: struct {
[; ;pic18f4520.h: 1036: unsigned :4;
[; ;pic18f4520.h: 1037: unsigned TX1IP :1;
[; ;pic18f4520.h: 1038: };
[; ;pic18f4520.h: 1039: } IPR1bits @ 0xF9F;
[; ;pic18f4520.h: 1042: extern volatile unsigned char PIE2 @ 0xFA0;
"1044
[; ;pic18f4520.h: 1044: asm("PIE2 equ 0FA0h");
[; <" PIE2 equ 0FA0h ;# ">
[; ;pic18f4520.h: 1047: extern volatile union {
[; ;pic18f4520.h: 1048: struct {
[; ;pic18f4520.h: 1049: unsigned CCP2IE :1;
[; ;pic18f4520.h: 1050: unsigned TMR3IE :1;
[; ;pic18f4520.h: 1051: unsigned HLVDIE :1;
[; ;pic18f4520.h: 1052: unsigned BCLIE :1;
[; ;pic18f4520.h: 1053: unsigned EEIE :1;
[; ;pic18f4520.h: 1054: unsigned :1;
[; ;pic18f4520.h: 1055: unsigned CMIE :1;
[; ;pic18f4520.h: 1056: unsigned OSCFIE :1;
[; ;pic18f4520.h: 1057: };
[; ;pic18f4520.h: 1058: struct {
[; ;pic18f4520.h: 1059: unsigned :2;
[; ;pic18f4520.h: 1060: unsigned LVDIE :1;
[; ;pic18f4520.h: 1061: };
[; ;pic18f4520.h: 1062: } PIE2bits @ 0xFA0;
[; ;pic18f4520.h: 1065: extern volatile unsigned char PIR2 @ 0xFA1;
"1067
[; ;pic18f4520.h: 1067: asm("PIR2 equ 0FA1h");
[; <" PIR2 equ 0FA1h ;# ">
[; ;pic18f4520.h: 1070: extern volatile union {
[; ;pic18f4520.h: 1071: struct {
[; ;pic18f4520.h: 1072: unsigned CCP2IF :1;
[; ;pic18f4520.h: 1073: unsigned TMR3IF :1;
[; ;pic18f4520.h: 1074: unsigned HLVDIF :1;
[; ;pic18f4520.h: 1075: unsigned BCLIF :1;
[; ;pic18f4520.h: 1076: unsigned EEIF :1;
[; ;pic18f4520.h: 1077: unsigned :1;
[; ;pic18f4520.h: 1078: unsigned CMIF :1;
[; ;pic18f4520.h: 1079: unsigned OSCFIF :1;
[; ;pic18f4520.h: 1080: };
[; ;pic18f4520.h: 1081: struct {
[; ;pic18f4520.h: 1082: unsigned :2;
[; ;pic18f4520.h: 1083: unsigned LVDIF :1;
[; ;pic18f4520.h: 1084: };
[; ;pic18f4520.h: 1085: } PIR2bits @ 0xFA1;
[; ;pic18f4520.h: 1088: extern volatile unsigned char IPR2 @ 0xFA2;
"1090
[; ;pic18f4520.h: 1090: asm("IPR2 equ 0FA2h");
[; <" IPR2 equ 0FA2h ;# ">
[; ;pic18f4520.h: 1093: extern volatile union {
[; ;pic18f4520.h: 1094: struct {
[; ;pic18f4520.h: 1095: unsigned CCP2IP :1;
[; ;pic18f4520.h: 1096: unsigned TMR3IP :1;
[; ;pic18f4520.h: 1097: unsigned HLVDIP :1;
[; ;pic18f4520.h: 1098: unsigned BCLIP :1;
[; ;pic18f4520.h: 1099: unsigned EEIP :1;
[; ;pic18f4520.h: 1100: unsigned :1;
[; ;pic18f4520.h: 1101: unsigned CMIP :1;
[; ;pic18f4520.h: 1102: unsigned OSCFIP :1;
[; ;pic18f4520.h: 1103: };
[; ;pic18f4520.h: 1104: struct {
[; ;pic18f4520.h: 1105: unsigned :2;
[; ;pic18f4520.h: 1106: unsigned LVDIP :1;
[; ;pic18f4520.h: 1107: };
[; ;pic18f4520.h: 1108: } IPR2bits @ 0xFA2;
[; ;pic18f4520.h: 1111: extern volatile unsigned char EECON1 @ 0xFA6;
"1113
[; ;pic18f4520.h: 1113: asm("EECON1 equ 0FA6h");
[; <" EECON1 equ 0FA6h ;# ">
[; ;pic18f4520.h: 1116: extern volatile union {
[; ;pic18f4520.h: 1117: struct {
[; ;pic18f4520.h: 1118: unsigned RD :1;
[; ;pic18f4520.h: 1119: unsigned WR :1;
[; ;pic18f4520.h: 1120: unsigned WREN :1;
[; ;pic18f4520.h: 1121: unsigned WRERR :1;
[; ;pic18f4520.h: 1122: unsigned FREE :1;
[; ;pic18f4520.h: 1123: unsigned :1;
[; ;pic18f4520.h: 1124: unsigned CFGS :1;
[; ;pic18f4520.h: 1125: unsigned EEPGD :1;
[; ;pic18f4520.h: 1126: };
[; ;pic18f4520.h: 1127: struct {
[; ;pic18f4520.h: 1128: unsigned :6;
[; ;pic18f4520.h: 1129: unsigned EEFS :1;
[; ;pic18f4520.h: 1130: };
[; ;pic18f4520.h: 1131: } EECON1bits @ 0xFA6;
[; ;pic18f4520.h: 1134: extern volatile unsigned char EECON2 @ 0xFA7;
"1136
[; ;pic18f4520.h: 1136: asm("EECON2 equ 0FA7h");
[; <" EECON2 equ 0FA7h ;# ">
[; ;pic18f4520.h: 1139: extern volatile union {
[; ;pic18f4520.h: 1140: struct {
[; ;pic18f4520.h: 1141: unsigned EECON2 :8;
[; ;pic18f4520.h: 1142: };
[; ;pic18f4520.h: 1143: } EECON2bits @ 0xFA7;
[; ;pic18f4520.h: 1146: extern volatile unsigned char EEDATA @ 0xFA8;
"1148
[; ;pic18f4520.h: 1148: asm("EEDATA equ 0FA8h");
[; <" EEDATA equ 0FA8h ;# ">
[; ;pic18f4520.h: 1151: extern volatile union {
[; ;pic18f4520.h: 1152: struct {
[; ;pic18f4520.h: 1153: unsigned EEDATA :8;
[; ;pic18f4520.h: 1154: };
[; ;pic18f4520.h: 1155: } EEDATAbits @ 0xFA8;
[; ;pic18f4520.h: 1158: extern volatile unsigned char EEADR @ 0xFA9;
"1160
[; ;pic18f4520.h: 1160: asm("EEADR equ 0FA9h");
[; <" EEADR equ 0FA9h ;# ">
[; ;pic18f4520.h: 1163: extern volatile union {
[; ;pic18f4520.h: 1164: struct {
[; ;pic18f4520.h: 1165: unsigned EEADR :8;
[; ;pic18f4520.h: 1166: };
[; ;pic18f4520.h: 1167: } EEADRbits @ 0xFA9;
[; ;pic18f4520.h: 1170: extern volatile unsigned char RCSTA @ 0xFAB;
"1172
[; ;pic18f4520.h: 1172: asm("RCSTA equ 0FABh");
[; <" RCSTA equ 0FABh ;# ">
[; ;pic18f4520.h: 1175: extern volatile unsigned char RCSTA1 @ 0xFAB;
"1177
[; ;pic18f4520.h: 1177: asm("RCSTA1 equ 0FABh");
[; <" RCSTA1 equ 0FABh ;# ">
[; ;pic18f4520.h: 1180: extern volatile union {
[; ;pic18f4520.h: 1181: struct {
[; ;pic18f4520.h: 1182: unsigned RX9D :1;
[; ;pic18f4520.h: 1183: unsigned OERR :1;
[; ;pic18f4520.h: 1184: unsigned FERR :1;
[; ;pic18f4520.h: 1185: unsigned ADDEN :1;
[; ;pic18f4520.h: 1186: unsigned CREN :1;
[; ;pic18f4520.h: 1187: unsigned SREN :1;
[; ;pic18f4520.h: 1188: unsigned RX9 :1;
[; ;pic18f4520.h: 1189: unsigned SPEN :1;
[; ;pic18f4520.h: 1190: };
[; ;pic18f4520.h: 1191: struct {
[; ;pic18f4520.h: 1192: unsigned :3;
[; ;pic18f4520.h: 1193: unsigned ADEN :1;
[; ;pic18f4520.h: 1194: };
[; ;pic18f4520.h: 1195: struct {
[; ;pic18f4520.h: 1196: unsigned :5;
[; ;pic18f4520.h: 1197: unsigned SRENA :1;
[; ;pic18f4520.h: 1198: };
[; ;pic18f4520.h: 1199: } RCSTAbits @ 0xFAB;
[; ;pic18f4520.h: 1201: extern volatile union {
[; ;pic18f4520.h: 1202: struct {
[; ;pic18f4520.h: 1203: unsigned RX9D :1;
[; ;pic18f4520.h: 1204: unsigned OERR :1;
[; ;pic18f4520.h: 1205: unsigned FERR :1;
[; ;pic18f4520.h: 1206: unsigned ADDEN :1;
[; ;pic18f4520.h: 1207: unsigned CREN :1;
[; ;pic18f4520.h: 1208: unsigned SREN :1;
[; ;pic18f4520.h: 1209: unsigned RX9 :1;
[; ;pic18f4520.h: 1210: unsigned SPEN :1;
[; ;pic18f4520.h: 1211: };
[; ;pic18f4520.h: 1212: struct {
[; ;pic18f4520.h: 1213: unsigned :3;
[; ;pic18f4520.h: 1214: unsigned ADEN :1;
[; ;pic18f4520.h: 1215: };
[; ;pic18f4520.h: 1216: struct {
[; ;pic18f4520.h: 1217: unsigned :5;
[; ;pic18f4520.h: 1218: unsigned SRENA :1;
[; ;pic18f4520.h: 1219: };
[; ;pic18f4520.h: 1220: } RCSTA1bits @ 0xFAB;
[; ;pic18f4520.h: 1223: extern volatile unsigned char TXSTA @ 0xFAC;
"1225
[; ;pic18f4520.h: 1225: asm("TXSTA equ 0FACh");
[; <" TXSTA equ 0FACh ;# ">
[; ;pic18f4520.h: 1228: extern volatile unsigned char TXSTA1 @ 0xFAC;
"1230
[; ;pic18f4520.h: 1230: asm("TXSTA1 equ 0FACh");
[; <" TXSTA1 equ 0FACh ;# ">
[; ;pic18f4520.h: 1233: extern volatile union {
[; ;pic18f4520.h: 1234: struct {
[; ;pic18f4520.h: 1235: unsigned TX9D :1;
[; ;pic18f4520.h: 1236: unsigned TRMT :1;
[; ;pic18f4520.h: 1237: unsigned BRGH :1;
[; ;pic18f4520.h: 1238: unsigned SENDB :1;
[; ;pic18f4520.h: 1239: unsigned SYNC :1;
[; ;pic18f4520.h: 1240: unsigned TXEN :1;
[; ;pic18f4520.h: 1241: unsigned TX9 :1;
[; ;pic18f4520.h: 1242: unsigned CSRC :1;
[; ;pic18f4520.h: 1243: };
[; ;pic18f4520.h: 1244: struct {
[; ;pic18f4520.h: 1245: unsigned :2;
[; ;pic18f4520.h: 1246: unsigned BRGH1 :1;
[; ;pic18f4520.h: 1247: };
[; ;pic18f4520.h: 1248: struct {
[; ;pic18f4520.h: 1249: unsigned :7;
[; ;pic18f4520.h: 1250: unsigned CSRC1 :1;
[; ;pic18f4520.h: 1251: };
[; ;pic18f4520.h: 1252: struct {
[; ;pic18f4520.h: 1253: unsigned :3;
[; ;pic18f4520.h: 1254: unsigned SENDB1 :1;
[; ;pic18f4520.h: 1255: };
[; ;pic18f4520.h: 1256: struct {
[; ;pic18f4520.h: 1257: unsigned :4;
[; ;pic18f4520.h: 1258: unsigned SYNC1 :1;
[; ;pic18f4520.h: 1259: };
[; ;pic18f4520.h: 1260: struct {
[; ;pic18f4520.h: 1261: unsigned :1;
[; ;pic18f4520.h: 1262: unsigned TRMT1 :1;
[; ;pic18f4520.h: 1263: };
[; ;pic18f4520.h: 1264: struct {
[; ;pic18f4520.h: 1265: unsigned :6;
[; ;pic18f4520.h: 1266: unsigned TX91 :1;
[; ;pic18f4520.h: 1267: };
[; ;pic18f4520.h: 1268: struct {
[; ;pic18f4520.h: 1269: unsigned TX9D1 :1;
[; ;pic18f4520.h: 1270: };
[; ;pic18f4520.h: 1271: struct {
[; ;pic18f4520.h: 1272: unsigned :5;
[; ;pic18f4520.h: 1273: unsigned TXEN1 :1;
[; ;pic18f4520.h: 1274: };
[; ;pic18f4520.h: 1275: } TXSTAbits @ 0xFAC;
[; ;pic18f4520.h: 1277: extern volatile union {
[; ;pic18f4520.h: 1278: struct {
[; ;pic18f4520.h: 1279: unsigned TX9D :1;
[; ;pic18f4520.h: 1280: unsigned TRMT :1;
[; ;pic18f4520.h: 1281: unsigned BRGH :1;
[; ;pic18f4520.h: 1282: unsigned SENDB :1;
[; ;pic18f4520.h: 1283: unsigned SYNC :1;
[; ;pic18f4520.h: 1284: unsigned TXEN :1;
[; ;pic18f4520.h: 1285: unsigned TX9 :1;
[; ;pic18f4520.h: 1286: unsigned CSRC :1;
[; ;pic18f4520.h: 1287: };
[; ;pic18f4520.h: 1288: struct {
[; ;pic18f4520.h: 1289: unsigned :2;
[; ;pic18f4520.h: 1290: unsigned BRGH1 :1;
[; ;pic18f4520.h: 1291: };
[; ;pic18f4520.h: 1292: struct {
[; ;pic18f4520.h: 1293: unsigned :7;
[; ;pic18f4520.h: 1294: unsigned CSRC1 :1;
[; ;pic18f4520.h: 1295: };
[; ;pic18f4520.h: 1296: struct {
[; ;pic18f4520.h: 1297: unsigned :3;
[; ;pic18f4520.h: 1298: unsigned SENDB1 :1;
[; ;pic18f4520.h: 1299: };
[; ;pic18f4520.h: 1300: struct {
[; ;pic18f4520.h: 1301: unsigned :4;
[; ;pic18f4520.h: 1302: unsigned SYNC1 :1;
[; ;pic18f4520.h: 1303: };
[; ;pic18f4520.h: 1304: struct {
[; ;pic18f4520.h: 1305: unsigned :1;
[; ;pic18f4520.h: 1306: unsigned TRMT1 :1;
[; ;pic18f4520.h: 1307: };
[; ;pic18f4520.h: 1308: struct {
[; ;pic18f4520.h: 1309: unsigned :6;
[; ;pic18f4520.h: 1310: unsigned TX91 :1;
[; ;pic18f4520.h: 1311: };
[; ;pic18f4520.h: 1312: struct {
[; ;pic18f4520.h: 1313: unsigned TX9D1 :1;
[; ;pic18f4520.h: 1314: };
[; ;pic18f4520.h: 1315: struct {
[; ;pic18f4520.h: 1316: unsigned :5;
[; ;pic18f4520.h: 1317: unsigned TXEN1 :1;
[; ;pic18f4520.h: 1318: };
[; ;pic18f4520.h: 1319: } TXSTA1bits @ 0xFAC;
[; ;pic18f4520.h: 1322: extern volatile unsigned char TXREG @ 0xFAD;
"1324
[; ;pic18f4520.h: 1324: asm("TXREG equ 0FADh");
[; <" TXREG equ 0FADh ;# ">
[; ;pic18f4520.h: 1327: extern volatile unsigned char TXREG1 @ 0xFAD;
"1329
[; ;pic18f4520.h: 1329: asm("TXREG1 equ 0FADh");
[; <" TXREG1 equ 0FADh ;# ">
[; ;pic18f4520.h: 1332: extern volatile union {
[; ;pic18f4520.h: 1333: struct {
[; ;pic18f4520.h: 1334: unsigned TXREG :8;
[; ;pic18f4520.h: 1335: };
[; ;pic18f4520.h: 1336: } TXREGbits @ 0xFAD;
[; ;pic18f4520.h: 1338: extern volatile union {
[; ;pic18f4520.h: 1339: struct {
[; ;pic18f4520.h: 1340: unsigned TXREG :8;
[; ;pic18f4520.h: 1341: };
[; ;pic18f4520.h: 1342: } TXREG1bits @ 0xFAD;
[; ;pic18f4520.h: 1345: extern volatile unsigned char RCREG @ 0xFAE;
"1347
[; ;pic18f4520.h: 1347: asm("RCREG equ 0FAEh");
[; <" RCREG equ 0FAEh ;# ">
[; ;pic18f4520.h: 1350: extern volatile unsigned char RCREG1 @ 0xFAE;
"1352
[; ;pic18f4520.h: 1352: asm("RCREG1 equ 0FAEh");
[; <" RCREG1 equ 0FAEh ;# ">
[; ;pic18f4520.h: 1355: extern volatile union {
[; ;pic18f4520.h: 1356: struct {
[; ;pic18f4520.h: 1357: unsigned RCREG :8;
[; ;pic18f4520.h: 1358: };
[; ;pic18f4520.h: 1359: } RCREGbits @ 0xFAE;
[; ;pic18f4520.h: 1361: extern volatile union {
[; ;pic18f4520.h: 1362: struct {
[; ;pic18f4520.h: 1363: unsigned RCREG :8;
[; ;pic18f4520.h: 1364: };
[; ;pic18f4520.h: 1365: } RCREG1bits @ 0xFAE;
[; ;pic18f4520.h: 1368: extern volatile unsigned char SPBRG @ 0xFAF;
"1370
[; ;pic18f4520.h: 1370: asm("SPBRG equ 0FAFh");
[; <" SPBRG equ 0FAFh ;# ">
[; ;pic18f4520.h: 1373: extern volatile unsigned char SPBRG1 @ 0xFAF;
"1375
[; ;pic18f4520.h: 1375: asm("SPBRG1 equ 0FAFh");
[; <" SPBRG1 equ 0FAFh ;# ">
[; ;pic18f4520.h: 1378: extern volatile union {
[; ;pic18f4520.h: 1379: struct {
[; ;pic18f4520.h: 1380: unsigned SPBRG :8;
[; ;pic18f4520.h: 1381: };
[; ;pic18f4520.h: 1382: } SPBRGbits @ 0xFAF;
[; ;pic18f4520.h: 1384: extern volatile union {
[; ;pic18f4520.h: 1385: struct {
[; ;pic18f4520.h: 1386: unsigned SPBRG :8;
[; ;pic18f4520.h: 1387: };
[; ;pic18f4520.h: 1388: } SPBRG1bits @ 0xFAF;
[; ;pic18f4520.h: 1391: extern volatile unsigned char SPBRGH @ 0xFB0;
"1393
[; ;pic18f4520.h: 1393: asm("SPBRGH equ 0FB0h");
[; <" SPBRGH equ 0FB0h ;# ">
[; ;pic18f4520.h: 1396: extern volatile union {
[; ;pic18f4520.h: 1397: struct {
[; ;pic18f4520.h: 1398: unsigned SPBRGH :8;
[; ;pic18f4520.h: 1399: };
[; ;pic18f4520.h: 1400: } SPBRGHbits @ 0xFB0;
[; ;pic18f4520.h: 1403: extern volatile unsigned char T3CON @ 0xFB1;
"1405
[; ;pic18f4520.h: 1405: asm("T3CON equ 0FB1h");
[; <" T3CON equ 0FB1h ;# ">
[; ;pic18f4520.h: 1408: extern volatile union {
[; ;pic18f4520.h: 1409: struct {
[; ;pic18f4520.h: 1410: unsigned :2;
[; ;pic18f4520.h: 1411: unsigned NOT_T3SYNC :1;
[; ;pic18f4520.h: 1412: };
[; ;pic18f4520.h: 1413: struct {
[; ;pic18f4520.h: 1414: unsigned TMR3ON :1;
[; ;pic18f4520.h: 1415: unsigned TMR3CS :1;
[; ;pic18f4520.h: 1416: unsigned nT3SYNC :1;
[; ;pic18f4520.h: 1417: unsigned T3CCP1 :1;
[; ;pic18f4520.h: 1418: unsigned T3CKPS :2;
[; ;pic18f4520.h: 1419: unsigned T3CCP2 :1;
[; ;pic18f4520.h: 1420: unsigned RD16 :1;
[; ;pic18f4520.h: 1421: };
[; ;pic18f4520.h: 1422: struct {
[; ;pic18f4520.h: 1423: unsigned :2;
[; ;pic18f4520.h: 1424: unsigned T3SYNC :1;
[; ;pic18f4520.h: 1425: unsigned :1;
[; ;pic18f4520.h: 1426: unsigned T3CKPS0 :1;
[; ;pic18f4520.h: 1427: unsigned T3CKPS1 :1;
[; ;pic18f4520.h: 1428: };
[; ;pic18f4520.h: 1429: struct {
[; ;pic18f4520.h: 1430: unsigned :7;
[; ;pic18f4520.h: 1431: unsigned RD163 :1;
[; ;pic18f4520.h: 1432: };
[; ;pic18f4520.h: 1433: struct {
[; ;pic18f4520.h: 1434: unsigned :3;
[; ;pic18f4520.h: 1435: unsigned SOSCEN3 :1;
[; ;pic18f4520.h: 1436: };
[; ;pic18f4520.h: 1437: struct {
[; ;pic18f4520.h: 1438: unsigned :7;
[; ;pic18f4520.h: 1439: unsigned T3RD16 :1;
[; ;pic18f4520.h: 1440: };
[; ;pic18f4520.h: 1441: } T3CONbits @ 0xFB1;
[; ;pic18f4520.h: 1444: extern volatile unsigned short TMR3 @ 0xFB2;
"1446
[; ;pic18f4520.h: 1446: asm("TMR3 equ 0FB2h");
[; <" TMR3 equ 0FB2h ;# ">
[; ;pic18f4520.h: 1449: extern volatile union {
[; ;pic18f4520.h: 1450: struct {
[; ;pic18f4520.h: 1451: unsigned TMR3 :16;
[; ;pic18f4520.h: 1452: };
[; ;pic18f4520.h: 1453: } TMR3bits @ 0xFB2;
[; ;pic18f4520.h: 1456: extern volatile unsigned char TMR3L @ 0xFB2;
"1458
[; ;pic18f4520.h: 1458: asm("TMR3L equ 0FB2h");
[; <" TMR3L equ 0FB2h ;# ">
[; ;pic18f4520.h: 1461: extern volatile union {
[; ;pic18f4520.h: 1462: struct {
[; ;pic18f4520.h: 1463: unsigned TMR3L :8;
[; ;pic18f4520.h: 1464: };
[; ;pic18f4520.h: 1465: } TMR3Lbits @ 0xFB2;
[; ;pic18f4520.h: 1468: extern volatile unsigned char TMR3H @ 0xFB3;
"1470
[; ;pic18f4520.h: 1470: asm("TMR3H equ 0FB3h");
[; <" TMR3H equ 0FB3h ;# ">
[; ;pic18f4520.h: 1473: extern volatile union {
[; ;pic18f4520.h: 1474: struct {
[; ;pic18f4520.h: 1475: unsigned TMR3H :8;
[; ;pic18f4520.h: 1476: };
[; ;pic18f4520.h: 1477: } TMR3Hbits @ 0xFB3;
[; ;pic18f4520.h: 1480: extern volatile unsigned char CMCON @ 0xFB4;
"1482
[; ;pic18f4520.h: 1482: asm("CMCON equ 0FB4h");
[; <" CMCON equ 0FB4h ;# ">
[; ;pic18f4520.h: 1485: extern volatile union {
[; ;pic18f4520.h: 1486: struct {
[; ;pic18f4520.h: 1487: unsigned CM :3;
[; ;pic18f4520.h: 1488: unsigned CIS :1;
[; ;pic18f4520.h: 1489: unsigned C1INV :1;
[; ;pic18f4520.h: 1490: unsigned C2INV :1;
[; ;pic18f4520.h: 1491: unsigned C1OUT :1;
[; ;pic18f4520.h: 1492: unsigned C2OUT :1;
[; ;pic18f4520.h: 1493: };
[; ;pic18f4520.h: 1494: struct {
[; ;pic18f4520.h: 1495: unsigned CM0 :1;
[; ;pic18f4520.h: 1496: unsigned CM1 :1;
[; ;pic18f4520.h: 1497: unsigned CM2 :1;
[; ;pic18f4520.h: 1498: };
[; ;pic18f4520.h: 1499: struct {
[; ;pic18f4520.h: 1500: unsigned CMEN0 :1;
[; ;pic18f4520.h: 1501: };
[; ;pic18f4520.h: 1502: struct {
[; ;pic18f4520.h: 1503: unsigned :1;
[; ;pic18f4520.h: 1504: unsigned CMEN1 :1;
[; ;pic18f4520.h: 1505: };
[; ;pic18f4520.h: 1506: struct {
[; ;pic18f4520.h: 1507: unsigned :2;
[; ;pic18f4520.h: 1508: unsigned CMEN2 :1;
[; ;pic18f4520.h: 1509: };
[; ;pic18f4520.h: 1510: } CMCONbits @ 0xFB4;
[; ;pic18f4520.h: 1513: extern volatile unsigned char CVRCON @ 0xFB5;
"1515
[; ;pic18f4520.h: 1515: asm("CVRCON equ 0FB5h");
[; <" CVRCON equ 0FB5h ;# ">
[; ;pic18f4520.h: 1518: extern volatile union {
[; ;pic18f4520.h: 1519: struct {
[; ;pic18f4520.h: 1520: unsigned CVR :4;
[; ;pic18f4520.h: 1521: unsigned CVRSS :1;
[; ;pic18f4520.h: 1522: unsigned CVRR :1;
[; ;pic18f4520.h: 1523: unsigned CVROE :1;
[; ;pic18f4520.h: 1524: unsigned CVREN :1;
[; ;pic18f4520.h: 1525: };
[; ;pic18f4520.h: 1526: struct {
[; ;pic18f4520.h: 1527: unsigned CVR0 :1;
[; ;pic18f4520.h: 1528: unsigned CVR1 :1;
[; ;pic18f4520.h: 1529: unsigned CVR2 :1;
[; ;pic18f4520.h: 1530: unsigned CVR3 :1;
[; ;pic18f4520.h: 1531: };
[; ;pic18f4520.h: 1532: struct {
[; ;pic18f4520.h: 1533: unsigned :6;
[; ;pic18f4520.h: 1534: unsigned CVROEN :1;
[; ;pic18f4520.h: 1535: };
[; ;pic18f4520.h: 1536: } CVRCONbits @ 0xFB5;
[; ;pic18f4520.h: 1539: extern volatile unsigned char ECCP1AS @ 0xFB6;
"1541
[; ;pic18f4520.h: 1541: asm("ECCP1AS equ 0FB6h");
[; <" ECCP1AS equ 0FB6h ;# ">
[; ;pic18f4520.h: 1544: extern volatile unsigned char ECCPAS @ 0xFB6;
"1546
[; ;pic18f4520.h: 1546: asm("ECCPAS equ 0FB6h");
[; <" ECCPAS equ 0FB6h ;# ">
[; ;pic18f4520.h: 1549: extern volatile union {
[; ;pic18f4520.h: 1550: struct {
[; ;pic18f4520.h: 1551: unsigned PSSBD :2;
[; ;pic18f4520.h: 1552: unsigned PSSAC :2;
[; ;pic18f4520.h: 1553: unsigned ECCPAS :3;
[; ;pic18f4520.h: 1554: unsigned ECCPASE :1;
[; ;pic18f4520.h: 1555: };
[; ;pic18f4520.h: 1556: struct {
[; ;pic18f4520.h: 1557: unsigned PSSBD0 :1;
[; ;pic18f4520.h: 1558: unsigned PSSBD1 :1;
[; ;pic18f4520.h: 1559: unsigned PSSAC0 :1;
[; ;pic18f4520.h: 1560: unsigned PSSAC1 :1;
[; ;pic18f4520.h: 1561: unsigned ECCPAS0 :1;
[; ;pic18f4520.h: 1562: unsigned ECCPAS1 :1;
[; ;pic18f4520.h: 1563: unsigned ECCPAS2 :1;
[; ;pic18f4520.h: 1564: };
[; ;pic18f4520.h: 1565: } ECCP1ASbits @ 0xFB6;
[; ;pic18f4520.h: 1567: extern volatile union {
[; ;pic18f4520.h: 1568: struct {
[; ;pic18f4520.h: 1569: unsigned PSSBD :2;
[; ;pic18f4520.h: 1570: unsigned PSSAC :2;
[; ;pic18f4520.h: 1571: unsigned ECCPAS :3;
[; ;pic18f4520.h: 1572: unsigned ECCPASE :1;
[; ;pic18f4520.h: 1573: };
[; ;pic18f4520.h: 1574: struct {
[; ;pic18f4520.h: 1575: unsigned PSSBD0 :1;
[; ;pic18f4520.h: 1576: unsigned PSSBD1 :1;
[; ;pic18f4520.h: 1577: unsigned PSSAC0 :1;
[; ;pic18f4520.h: 1578: unsigned PSSAC1 :1;
[; ;pic18f4520.h: 1579: unsigned ECCPAS0 :1;
[; ;pic18f4520.h: 1580: unsigned ECCPAS1 :1;
[; ;pic18f4520.h: 1581: unsigned ECCPAS2 :1;
[; ;pic18f4520.h: 1582: };
[; ;pic18f4520.h: 1583: } ECCPASbits @ 0xFB6;
[; ;pic18f4520.h: 1586: extern volatile unsigned char PWM1CON @ 0xFB7;
"1588
[; ;pic18f4520.h: 1588: asm("PWM1CON equ 0FB7h");
[; <" PWM1CON equ 0FB7h ;# ">
[; ;pic18f4520.h: 1591: extern volatile unsigned char ECCP1DEL @ 0xFB7;
"1593
[; ;pic18f4520.h: 1593: asm("ECCP1DEL equ 0FB7h");
[; <" ECCP1DEL equ 0FB7h ;# ">
[; ;pic18f4520.h: 1596: extern volatile union {
[; ;pic18f4520.h: 1597: struct {
[; ;pic18f4520.h: 1598: unsigned PDC :7;
[; ;pic18f4520.h: 1599: unsigned PRSEN :1;
[; ;pic18f4520.h: 1600: };
[; ;pic18f4520.h: 1601: struct {
[; ;pic18f4520.h: 1602: unsigned PDC0 :1;
[; ;pic18f4520.h: 1603: unsigned PDC1 :1;
[; ;pic18f4520.h: 1604: unsigned PDC2 :1;
[; ;pic18f4520.h: 1605: unsigned PDC3 :1;
[; ;pic18f4520.h: 1606: unsigned PDC4 :1;
[; ;pic18f4520.h: 1607: unsigned PDC5 :1;
[; ;pic18f4520.h: 1608: unsigned PDC6 :1;
[; ;pic18f4520.h: 1609: };
[; ;pic18f4520.h: 1610: } PWM1CONbits @ 0xFB7;
[; ;pic18f4520.h: 1612: extern volatile union {
[; ;pic18f4520.h: 1613: struct {
[; ;pic18f4520.h: 1614: unsigned PDC :7;
[; ;pic18f4520.h: 1615: unsigned PRSEN :1;
[; ;pic18f4520.h: 1616: };
[; ;pic18f4520.h: 1617: struct {
[; ;pic18f4520.h: 1618: unsigned PDC0 :1;
[; ;pic18f4520.h: 1619: unsigned PDC1 :1;
[; ;pic18f4520.h: 1620: unsigned PDC2 :1;
[; ;pic18f4520.h: 1621: unsigned PDC3 :1;
[; ;pic18f4520.h: 1622: unsigned PDC4 :1;
[; ;pic18f4520.h: 1623: unsigned PDC5 :1;
[; ;pic18f4520.h: 1624: unsigned PDC6 :1;
[; ;pic18f4520.h: 1625: };
[; ;pic18f4520.h: 1626: } ECCP1DELbits @ 0xFB7;
[; ;pic18f4520.h: 1629: extern volatile unsigned char BAUDCON @ 0xFB8;
"1631
[; ;pic18f4520.h: 1631: asm("BAUDCON equ 0FB8h");
[; <" BAUDCON equ 0FB8h ;# ">
[; ;pic18f4520.h: 1634: extern volatile unsigned char BAUDCTL @ 0xFB8;
"1636
[; ;pic18f4520.h: 1636: asm("BAUDCTL equ 0FB8h");
[; <" BAUDCTL equ 0FB8h ;# ">
[; ;pic18f4520.h: 1639: extern volatile union {
[; ;pic18f4520.h: 1640: struct {
[; ;pic18f4520.h: 1641: unsigned ABDEN :1;
[; ;pic18f4520.h: 1642: unsigned WUE :1;
[; ;pic18f4520.h: 1643: unsigned :1;
[; ;pic18f4520.h: 1644: unsigned BRG16 :1;
[; ;pic18f4520.h: 1645: unsigned TXCKP :1;
[; ;pic18f4520.h: 1646: unsigned RXDTP :1;
[; ;pic18f4520.h: 1647: unsigned RCIDL :1;
[; ;pic18f4520.h: 1648: unsigned ABDOVF :1;
[; ;pic18f4520.h: 1649: };
[; ;pic18f4520.h: 1650: struct {
[; ;pic18f4520.h: 1651: unsigned :4;
[; ;pic18f4520.h: 1652: unsigned SCKP :1;
[; ;pic18f4520.h: 1653: unsigned :1;
[; ;pic18f4520.h: 1654: unsigned RCMT :1;
[; ;pic18f4520.h: 1655: };
[; ;pic18f4520.h: 1656: struct {
[; ;pic18f4520.h: 1657: unsigned :5;
[; ;pic18f4520.h: 1658: unsigned RXCKP :1;
[; ;pic18f4520.h: 1659: };
[; ;pic18f4520.h: 1660: struct {
[; ;pic18f4520.h: 1661: unsigned :1;
[; ;pic18f4520.h: 1662: unsigned W4E :1;
[; ;pic18f4520.h: 1663: };
[; ;pic18f4520.h: 1664: } BAUDCONbits @ 0xFB8;
[; ;pic18f4520.h: 1666: extern volatile union {
[; ;pic18f4520.h: 1667: struct {
[; ;pic18f4520.h: 1668: unsigned ABDEN :1;
[; ;pic18f4520.h: 1669: unsigned WUE :1;
[; ;pic18f4520.h: 1670: unsigned :1;
[; ;pic18f4520.h: 1671: unsigned BRG16 :1;
[; ;pic18f4520.h: 1672: unsigned TXCKP :1;
[; ;pic18f4520.h: 1673: unsigned RXDTP :1;
[; ;pic18f4520.h: 1674: unsigned RCIDL :1;
[; ;pic18f4520.h: 1675: unsigned ABDOVF :1;
[; ;pic18f4520.h: 1676: };
[; ;pic18f4520.h: 1677: struct {
[; ;pic18f4520.h: 1678: unsigned :4;
[; ;pic18f4520.h: 1679: unsigned SCKP :1;
[; ;pic18f4520.h: 1680: unsigned :1;
[; ;pic18f4520.h: 1681: unsigned RCMT :1;
[; ;pic18f4520.h: 1682: };
[; ;pic18f4520.h: 1683: struct {
[; ;pic18f4520.h: 1684: unsigned :5;
[; ;pic18f4520.h: 1685: unsigned RXCKP :1;
[; ;pic18f4520.h: 1686: };
[; ;pic18f4520.h: 1687: struct {
[; ;pic18f4520.h: 1688: unsigned :1;
[; ;pic18f4520.h: 1689: unsigned W4E :1;
[; ;pic18f4520.h: 1690: };
[; ;pic18f4520.h: 1691: } BAUDCTLbits @ 0xFB8;
[; ;pic18f4520.h: 1694: extern volatile unsigned char CCP2CON @ 0xFBA;
"1696
[; ;pic18f4520.h: 1696: asm("CCP2CON equ 0FBAh");
[; <" CCP2CON equ 0FBAh ;# ">
[; ;pic18f4520.h: 1699: extern volatile union {
[; ;pic18f4520.h: 1700: struct {
[; ;pic18f4520.h: 1701: unsigned CCP2M :4;
[; ;pic18f4520.h: 1702: unsigned DC2B :2;
[; ;pic18f4520.h: 1703: };
[; ;pic18f4520.h: 1704: struct {
[; ;pic18f4520.h: 1705: unsigned CCP2M0 :1;
[; ;pic18f4520.h: 1706: unsigned CCP2M1 :1;
[; ;pic18f4520.h: 1707: unsigned CCP2M2 :1;
[; ;pic18f4520.h: 1708: unsigned CCP2M3 :1;
[; ;pic18f4520.h: 1709: unsigned CCP2Y :1;
[; ;pic18f4520.h: 1710: unsigned CCP2X :1;
[; ;pic18f4520.h: 1711: };
[; ;pic18f4520.h: 1712: struct {
[; ;pic18f4520.h: 1713: unsigned :4;
[; ;pic18f4520.h: 1714: unsigned DC2B0 :1;
[; ;pic18f4520.h: 1715: unsigned DC2B1 :1;
[; ;pic18f4520.h: 1716: };
[; ;pic18f4520.h: 1717: } CCP2CONbits @ 0xFBA;
[; ;pic18f4520.h: 1720: extern volatile unsigned short CCPR2 @ 0xFBB;
"1722
[; ;pic18f4520.h: 1722: asm("CCPR2 equ 0FBBh");
[; <" CCPR2 equ 0FBBh ;# ">
[; ;pic18f4520.h: 1725: extern volatile union {
[; ;pic18f4520.h: 1726: struct {
[; ;pic18f4520.h: 1727: unsigned CCPR2 :16;
[; ;pic18f4520.h: 1728: };
[; ;pic18f4520.h: 1729: } CCPR2bits @ 0xFBB;
[; ;pic18f4520.h: 1732: extern volatile unsigned char CCPR2L @ 0xFBB;
"1734
[; ;pic18f4520.h: 1734: asm("CCPR2L equ 0FBBh");
[; <" CCPR2L equ 0FBBh ;# ">
[; ;pic18f4520.h: 1737: extern volatile union {
[; ;pic18f4520.h: 1738: struct {
[; ;pic18f4520.h: 1739: unsigned CCPR2L :8;
[; ;pic18f4520.h: 1740: };
[; ;pic18f4520.h: 1741: } CCPR2Lbits @ 0xFBB;
[; ;pic18f4520.h: 1744: extern volatile unsigned char CCPR2H @ 0xFBC;
"1746
[; ;pic18f4520.h: 1746: asm("CCPR2H equ 0FBCh");
[; <" CCPR2H equ 0FBCh ;# ">
[; ;pic18f4520.h: 1749: extern volatile union {
[; ;pic18f4520.h: 1750: struct {
[; ;pic18f4520.h: 1751: unsigned CCPR2H :8;
[; ;pic18f4520.h: 1752: };
[; ;pic18f4520.h: 1753: } CCPR2Hbits @ 0xFBC;
[; ;pic18f4520.h: 1756: extern volatile unsigned char CCP1CON @ 0xFBD;
"1758
[; ;pic18f4520.h: 1758: asm("CCP1CON equ 0FBDh");
[; <" CCP1CON equ 0FBDh ;# ">
[; ;pic18f4520.h: 1761: extern volatile union {
[; ;pic18f4520.h: 1762: struct {
[; ;pic18f4520.h: 1763: unsigned CCP1M :4;
[; ;pic18f4520.h: 1764: unsigned DC1B :2;
[; ;pic18f4520.h: 1765: unsigned P1M :2;
[; ;pic18f4520.h: 1766: };
[; ;pic18f4520.h: 1767: struct {
[; ;pic18f4520.h: 1768: unsigned CCP1M0 :1;
[; ;pic18f4520.h: 1769: unsigned CCP1M1 :1;
[; ;pic18f4520.h: 1770: unsigned CCP1M2 :1;
[; ;pic18f4520.h: 1771: unsigned CCP1M3 :1;
[; ;pic18f4520.h: 1772: unsigned CCP1Y :1;
[; ;pic18f4520.h: 1773: unsigned CCP1X :1;
[; ;pic18f4520.h: 1774: unsigned P1M0 :1;
[; ;pic18f4520.h: 1775: unsigned P1M1 :1;
[; ;pic18f4520.h: 1776: };
[; ;pic18f4520.h: 1777: struct {
[; ;pic18f4520.h: 1778: unsigned :4;
[; ;pic18f4520.h: 1779: unsigned DC1B0 :1;
[; ;pic18f4520.h: 1780: unsigned DC1B1 :1;
[; ;pic18f4520.h: 1781: };
[; ;pic18f4520.h: 1782: } CCP1CONbits @ 0xFBD;
[; ;pic18f4520.h: 1785: extern volatile unsigned short CCPR1 @ 0xFBE;
"1787
[; ;pic18f4520.h: 1787: asm("CCPR1 equ 0FBEh");
[; <" CCPR1 equ 0FBEh ;# ">
[; ;pic18f4520.h: 1790: extern volatile union {
[; ;pic18f4520.h: 1791: struct {
[; ;pic18f4520.h: 1792: unsigned CCPR1 :16;
[; ;pic18f4520.h: 1793: };
[; ;pic18f4520.h: 1794: } CCPR1bits @ 0xFBE;
[; ;pic18f4520.h: 1797: extern volatile unsigned char CCPR1L @ 0xFBE;
"1799
[; ;pic18f4520.h: 1799: asm("CCPR1L equ 0FBEh");
[; <" CCPR1L equ 0FBEh ;# ">
[; ;pic18f4520.h: 1802: extern volatile union {
[; ;pic18f4520.h: 1803: struct {
[; ;pic18f4520.h: 1804: unsigned CCPR1L :8;
[; ;pic18f4520.h: 1805: };
[; ;pic18f4520.h: 1806: } CCPR1Lbits @ 0xFBE;
[; ;pic18f4520.h: 1809: extern volatile unsigned char CCPR1H @ 0xFBF;
"1811
[; ;pic18f4520.h: 1811: asm("CCPR1H equ 0FBFh");
[; <" CCPR1H equ 0FBFh ;# ">
[; ;pic18f4520.h: 1814: extern volatile union {
[; ;pic18f4520.h: 1815: struct {
[; ;pic18f4520.h: 1816: unsigned CCPR1H :8;
[; ;pic18f4520.h: 1817: };
[; ;pic18f4520.h: 1818: } CCPR1Hbits @ 0xFBF;
[; ;pic18f4520.h: 1821: extern volatile unsigned char ADCON2 @ 0xFC0;
"1823
[; ;pic18f4520.h: 1823: asm("ADCON2 equ 0FC0h");
[; <" ADCON2 equ 0FC0h ;# ">
[; ;pic18f4520.h: 1826: extern volatile union {
[; ;pic18f4520.h: 1827: struct {
[; ;pic18f4520.h: 1828: unsigned ADCS :3;
[; ;pic18f4520.h: 1829: unsigned ACQT :3;
[; ;pic18f4520.h: 1830: unsigned :1;
[; ;pic18f4520.h: 1831: unsigned ADFM :1;
[; ;pic18f4520.h: 1832: };
[; ;pic18f4520.h: 1833: struct {
[; ;pic18f4520.h: 1834: unsigned ADCS0 :1;
[; ;pic18f4520.h: 1835: unsigned ADCS1 :1;
[; ;pic18f4520.h: 1836: unsigned ADCS2 :1;
[; ;pic18f4520.h: 1837: unsigned ACQT0 :1;
[; ;pic18f4520.h: 1838: unsigned ACQT1 :1;
[; ;pic18f4520.h: 1839: unsigned ACQT2 :1;
[; ;pic18f4520.h: 1840: };
[; ;pic18f4520.h: 1841: } ADCON2bits @ 0xFC0;
[; ;pic18f4520.h: 1844: extern volatile unsigned char ADCON1 @ 0xFC1;
"1846
[; ;pic18f4520.h: 1846: asm("ADCON1 equ 0FC1h");
[; <" ADCON1 equ 0FC1h ;# ">
[; ;pic18f4520.h: 1849: extern volatile union {
[; ;pic18f4520.h: 1850: struct {
[; ;pic18f4520.h: 1851: unsigned PCFG :4;
[; ;pic18f4520.h: 1852: unsigned VCFG :2;
[; ;pic18f4520.h: 1853: };
[; ;pic18f4520.h: 1854: struct {
[; ;pic18f4520.h: 1855: unsigned PCFG0 :1;
[; ;pic18f4520.h: 1856: unsigned PCFG1 :1;
[; ;pic18f4520.h: 1857: unsigned PCFG2 :1;
[; ;pic18f4520.h: 1858: unsigned PCFG3 :1;
[; ;pic18f4520.h: 1859: unsigned VCFG0 :1;
[; ;pic18f4520.h: 1860: unsigned VCFG1 :1;
[; ;pic18f4520.h: 1861: };
[; ;pic18f4520.h: 1862: struct {
[; ;pic18f4520.h: 1863: unsigned :3;
[; ;pic18f4520.h: 1864: unsigned CHSN3 :1;
[; ;pic18f4520.h: 1865: };
[; ;pic18f4520.h: 1866: struct {
[; ;pic18f4520.h: 1867: unsigned :4;
[; ;pic18f4520.h: 1868: unsigned VCFG01 :1;
[; ;pic18f4520.h: 1869: };
[; ;pic18f4520.h: 1870: struct {
[; ;pic18f4520.h: 1871: unsigned :5;
[; ;pic18f4520.h: 1872: unsigned VCFG11 :1;
[; ;pic18f4520.h: 1873: };
[; ;pic18f4520.h: 1874: } ADCON1bits @ 0xFC1;
[; ;pic18f4520.h: 1877: extern volatile unsigned char ADCON0 @ 0xFC2;
"1879
[; ;pic18f4520.h: 1879: asm("ADCON0 equ 0FC2h");
[; <" ADCON0 equ 0FC2h ;# ">
[; ;pic18f4520.h: 1882: extern volatile union {
[; ;pic18f4520.h: 1883: struct {
[; ;pic18f4520.h: 1884: unsigned :1;
[; ;pic18f4520.h: 1885: unsigned GO_NOT_DONE :1;
[; ;pic18f4520.h: 1886: };
[; ;pic18f4520.h: 1887: struct {
[; ;pic18f4520.h: 1888: unsigned ADON :1;
[; ;pic18f4520.h: 1889: unsigned GO_nDONE :1;
[; ;pic18f4520.h: 1890: unsigned CHS :4;
[; ;pic18f4520.h: 1891: };
[; ;pic18f4520.h: 1892: struct {
[; ;pic18f4520.h: 1893: unsigned :1;
[; ;pic18f4520.h: 1894: unsigned GO_NOT_DONE :1;
[; ;pic18f4520.h: 1895: };
[; ;pic18f4520.h: 1896: struct {
[; ;pic18f4520.h: 1897: unsigned ADON :1;
[; ;pic18f4520.h: 1898: unsigned GO_nDONE :1;
[; ;pic18f4520.h: 1899: unsigned CHS :4;
[; ;pic18f4520.h: 1900: };
[; ;pic18f4520.h: 1901: struct {
[; ;pic18f4520.h: 1902: unsigned :1;
[; ;pic18f4520.h: 1903: unsigned GO :1;
[; ;pic18f4520.h: 1904: unsigned CHS0 :1;
[; ;pic18f4520.h: 1905: unsigned CHS1 :1;
[; ;pic18f4520.h: 1906: unsigned CHS2 :1;
[; ;pic18f4520.h: 1907: unsigned CHS3 :1;
[; ;pic18f4520.h: 1908: };
[; ;pic18f4520.h: 1909: struct {
[; ;pic18f4520.h: 1910: unsigned :1;
[; ;pic18f4520.h: 1911: unsigned DONE :1;
[; ;pic18f4520.h: 1912: };
[; ;pic18f4520.h: 1913: struct {
[; ;pic18f4520.h: 1914: unsigned :1;
[; ;pic18f4520.h: 1915: unsigned NOT_DONE :1;
[; ;pic18f4520.h: 1916: };
[; ;pic18f4520.h: 1917: struct {
[; ;pic18f4520.h: 1918: unsigned :1;
[; ;pic18f4520.h: 1919: unsigned nDONE :1;
[; ;pic18f4520.h: 1920: };
[; ;pic18f4520.h: 1921: struct {
[; ;pic18f4520.h: 1922: unsigned :1;
[; ;pic18f4520.h: 1923: unsigned GO_DONE :1;
[; ;pic18f4520.h: 1924: };
[; ;pic18f4520.h: 1925: struct {
[; ;pic18f4520.h: 1926: unsigned :1;
[; ;pic18f4520.h: 1927: unsigned GODONE :1;
[; ;pic18f4520.h: 1928: };
[; ;pic18f4520.h: 1929: } ADCON0bits @ 0xFC2;
[; ;pic18f4520.h: 1932: extern volatile unsigned short ADRES @ 0xFC3;
"1934
[; ;pic18f4520.h: 1934: asm("ADRES equ 0FC3h");
[; <" ADRES equ 0FC3h ;# ">
[; ;pic18f4520.h: 1937: extern volatile union {
[; ;pic18f4520.h: 1938: struct {
[; ;pic18f4520.h: 1939: unsigned ADRES :16;
[; ;pic18f4520.h: 1940: };
[; ;pic18f4520.h: 1941: } ADRESbits @ 0xFC3;
[; ;pic18f4520.h: 1944: extern volatile unsigned char ADRESL @ 0xFC3;
"1946
[; ;pic18f4520.h: 1946: asm("ADRESL equ 0FC3h");
[; <" ADRESL equ 0FC3h ;# ">
[; ;pic18f4520.h: 1949: extern volatile union {
[; ;pic18f4520.h: 1950: struct {
[; ;pic18f4520.h: 1951: unsigned ADRESL :8;
[; ;pic18f4520.h: 1952: };
[; ;pic18f4520.h: 1953: } ADRESLbits @ 0xFC3;
[; ;pic18f4520.h: 1956: extern volatile unsigned char ADRESH @ 0xFC4;
"1958
[; ;pic18f4520.h: 1958: asm("ADRESH equ 0FC4h");
[; <" ADRESH equ 0FC4h ;# ">
[; ;pic18f4520.h: 1961: extern volatile union {
[; ;pic18f4520.h: 1962: struct {
[; ;pic18f4520.h: 1963: unsigned ADRESH :8;
[; ;pic18f4520.h: 1964: };
[; ;pic18f4520.h: 1965: } ADRESHbits @ 0xFC4;
[; ;pic18f4520.h: 1968: extern volatile unsigned char SSPCON2 @ 0xFC5;
"1970
[; ;pic18f4520.h: 1970: asm("SSPCON2 equ 0FC5h");
[; <" SSPCON2 equ 0FC5h ;# ">
[; ;pic18f4520.h: 1973: extern volatile union {
[; ;pic18f4520.h: 1974: struct {
[; ;pic18f4520.h: 1975: unsigned SEN :1;
[; ;pic18f4520.h: 1976: unsigned RSEN :1;
[; ;pic18f4520.h: 1977: unsigned PEN :1;
[; ;pic18f4520.h: 1978: unsigned RCEN :1;
[; ;pic18f4520.h: 1979: unsigned ACKEN :1;
[; ;pic18f4520.h: 1980: unsigned ACKDT :1;
[; ;pic18f4520.h: 1981: unsigned ACKSTAT :1;
[; ;pic18f4520.h: 1982: unsigned GCEN :1;
[; ;pic18f4520.h: 1983: };
[; ;pic18f4520.h: 1984: struct {
[; ;pic18f4520.h: 1985: unsigned :1;
[; ;pic18f4520.h: 1986: unsigned ADMSK1 :1;
[; ;pic18f4520.h: 1987: unsigned ADMSK2 :1;
[; ;pic18f4520.h: 1988: unsigned ADMSK3 :1;
[; ;pic18f4520.h: 1989: unsigned ADMSK4 :1;
[; ;pic18f4520.h: 1990: unsigned ADMSK5 :1;
[; ;pic18f4520.h: 1991: };
[; ;pic18f4520.h: 1992: } SSPCON2bits @ 0xFC5;
[; ;pic18f4520.h: 1995: extern volatile unsigned char SSPCON1 @ 0xFC6;
"1997
[; ;pic18f4520.h: 1997: asm("SSPCON1 equ 0FC6h");
[; <" SSPCON1 equ 0FC6h ;# ">
[; ;pic18f4520.h: 2000: extern volatile union {
[; ;pic18f4520.h: 2001: struct {
[; ;pic18f4520.h: 2002: unsigned SSPM :4;
[; ;pic18f4520.h: 2003: unsigned CKP :1;
[; ;pic18f4520.h: 2004: unsigned SSPEN :1;
[; ;pic18f4520.h: 2005: unsigned SSPOV :1;
[; ;pic18f4520.h: 2006: unsigned WCOL :1;
[; ;pic18f4520.h: 2007: };
[; ;pic18f4520.h: 2008: struct {
[; ;pic18f4520.h: 2009: unsigned SSPM0 :1;
[; ;pic18f4520.h: 2010: unsigned SSPM1 :1;
[; ;pic18f4520.h: 2011: unsigned SSPM2 :1;
[; ;pic18f4520.h: 2012: unsigned SSPM3 :1;
[; ;pic18f4520.h: 2013: };
[; ;pic18f4520.h: 2014: } SSPCON1bits @ 0xFC6;
[; ;pic18f4520.h: 2017: extern volatile unsigned char SSPSTAT @ 0xFC7;
"2019
[; ;pic18f4520.h: 2019: asm("SSPSTAT equ 0FC7h");
[; <" SSPSTAT equ 0FC7h ;# ">
[; ;pic18f4520.h: 2022: extern volatile union {
[; ;pic18f4520.h: 2023: struct {
[; ;pic18f4520.h: 2024: unsigned :2;
[; ;pic18f4520.h: 2025: unsigned R_NOT_W :1;
[; ;pic18f4520.h: 2026: };
[; ;pic18f4520.h: 2027: struct {
[; ;pic18f4520.h: 2028: unsigned :5;
[; ;pic18f4520.h: 2029: unsigned D_NOT_A :1;
[; ;pic18f4520.h: 2030: };
[; ;pic18f4520.h: 2031: struct {
[; ;pic18f4520.h: 2032: unsigned BF :1;
[; ;pic18f4520.h: 2033: unsigned UA :1;
[; ;pic18f4520.h: 2034: unsigned R_nW :1;
[; ;pic18f4520.h: 2035: unsigned S :1;
[; ;pic18f4520.h: 2036: unsigned P :1;
[; ;pic18f4520.h: 2037: unsigned D_nA :1;
[; ;pic18f4520.h: 2038: unsigned CKE :1;
[; ;pic18f4520.h: 2039: unsigned SMP :1;
[; ;pic18f4520.h: 2040: };
[; ;pic18f4520.h: 2041: struct {
[; ;pic18f4520.h: 2042: unsigned :2;
[; ;pic18f4520.h: 2043: unsigned R_NOT_W :1;
[; ;pic18f4520.h: 2044: };
[; ;pic18f4520.h: 2045: struct {
[; ;pic18f4520.h: 2046: unsigned :5;
[; ;pic18f4520.h: 2047: unsigned D_NOT_A :1;
[; ;pic18f4520.h: 2048: };
[; ;pic18f4520.h: 2049: struct {
[; ;pic18f4520.h: 2050: unsigned BF :1;
[; ;pic18f4520.h: 2051: unsigned UA :1;
[; ;pic18f4520.h: 2052: unsigned R_nW :1;
[; ;pic18f4520.h: 2053: unsigned S :1;
[; ;pic18f4520.h: 2054: unsigned P :1;
[; ;pic18f4520.h: 2055: unsigned D_nA :1;
[; ;pic18f4520.h: 2056: unsigned CKE :1;
[; ;pic18f4520.h: 2057: unsigned SMP :1;
[; ;pic18f4520.h: 2058: };
[; ;pic18f4520.h: 2059: struct {
[; ;pic18f4520.h: 2060: unsigned :2;
[; ;pic18f4520.h: 2061: unsigned R :1;
[; ;pic18f4520.h: 2062: unsigned :2;
[; ;pic18f4520.h: 2063: unsigned D :1;
[; ;pic18f4520.h: 2064: };
[; ;pic18f4520.h: 2065: struct {
[; ;pic18f4520.h: 2066: unsigned :2;
[; ;pic18f4520.h: 2067: unsigned W :1;
[; ;pic18f4520.h: 2068: unsigned :2;
[; ;pic18f4520.h: 2069: unsigned A :1;
[; ;pic18f4520.h: 2070: };
[; ;pic18f4520.h: 2071: struct {
[; ;pic18f4520.h: 2072: unsigned :2;
[; ;pic18f4520.h: 2073: unsigned nW :1;
[; ;pic18f4520.h: 2074: unsigned :2;
[; ;pic18f4520.h: 2075: unsigned nA :1;
[; ;pic18f4520.h: 2076: };
[; ;pic18f4520.h: 2077: struct {
[; ;pic18f4520.h: 2078: unsigned :2;
[; ;pic18f4520.h: 2079: unsigned R_W :1;
[; ;pic18f4520.h: 2080: unsigned :2;
[; ;pic18f4520.h: 2081: unsigned D_A :1;
[; ;pic18f4520.h: 2082: };
[; ;pic18f4520.h: 2083: struct {
[; ;pic18f4520.h: 2084: unsigned :2;
[; ;pic18f4520.h: 2085: unsigned NOT_WRITE :1;
[; ;pic18f4520.h: 2086: };
[; ;pic18f4520.h: 2087: struct {
[; ;pic18f4520.h: 2088: unsigned :5;
[; ;pic18f4520.h: 2089: unsigned NOT_ADDRESS :1;
[; ;pic18f4520.h: 2090: };
[; ;pic18f4520.h: 2091: struct {
[; ;pic18f4520.h: 2092: unsigned :2;
[; ;pic18f4520.h: 2093: unsigned nWRITE :1;
[; ;pic18f4520.h: 2094: unsigned :2;
[; ;pic18f4520.h: 2095: unsigned nADDRESS :1;
[; ;pic18f4520.h: 2096: };
[; ;pic18f4520.h: 2097: struct {
[; ;pic18f4520.h: 2098: unsigned :5;
[; ;pic18f4520.h: 2099: unsigned DA :1;
[; ;pic18f4520.h: 2100: };
[; ;pic18f4520.h: 2101: struct {
[; ;pic18f4520.h: 2102: unsigned :2;
[; ;pic18f4520.h: 2103: unsigned RW :1;
[; ;pic18f4520.h: 2104: };
[; ;pic18f4520.h: 2105: struct {
[; ;pic18f4520.h: 2106: unsigned :3;
[; ;pic18f4520.h: 2107: unsigned START :1;
[; ;pic18f4520.h: 2108: };
[; ;pic18f4520.h: 2109: struct {
[; ;pic18f4520.h: 2110: unsigned :4;
[; ;pic18f4520.h: 2111: unsigned STOP :1;
[; ;pic18f4520.h: 2112: };
[; ;pic18f4520.h: 2113: struct {
[; ;pic18f4520.h: 2114: unsigned :2;
[; ;pic18f4520.h: 2115: unsigned NOT_W :1;
[; ;pic18f4520.h: 2116: };
[; ;pic18f4520.h: 2117: struct {
[; ;pic18f4520.h: 2118: unsigned :5;
[; ;pic18f4520.h: 2119: unsigned NOT_A :1;
[; ;pic18f4520.h: 2120: };
[; ;pic18f4520.h: 2121: } SSPSTATbits @ 0xFC7;
[; ;pic18f4520.h: 2124: extern volatile unsigned char SSPADD @ 0xFC8;
"2126
[; ;pic18f4520.h: 2126: asm("SSPADD equ 0FC8h");
[; <" SSPADD equ 0FC8h ;# ">
[; ;pic18f4520.h: 2129: extern volatile union {
[; ;pic18f4520.h: 2130: struct {
[; ;pic18f4520.h: 2131: unsigned SSPADD :8;
[; ;pic18f4520.h: 2132: };
[; ;pic18f4520.h: 2133: } SSPADDbits @ 0xFC8;
[; ;pic18f4520.h: 2136: extern volatile unsigned char SSPBUF @ 0xFC9;
"2138
[; ;pic18f4520.h: 2138: asm("SSPBUF equ 0FC9h");
[; <" SSPBUF equ 0FC9h ;# ">
[; ;pic18f4520.h: 2141: extern volatile union {
[; ;pic18f4520.h: 2142: struct {
[; ;pic18f4520.h: 2143: unsigned SSPBUF :8;
[; ;pic18f4520.h: 2144: };
[; ;pic18f4520.h: 2145: } SSPBUFbits @ 0xFC9;
[; ;pic18f4520.h: 2148: extern volatile unsigned char T2CON @ 0xFCA;
"2150
[; ;pic18f4520.h: 2150: asm("T2CON equ 0FCAh");
[; <" T2CON equ 0FCAh ;# ">
[; ;pic18f4520.h: 2153: extern volatile union {
[; ;pic18f4520.h: 2154: struct {
[; ;pic18f4520.h: 2155: unsigned T2CKPS :2;
[; ;pic18f4520.h: 2156: unsigned TMR2ON :1;
[; ;pic18f4520.h: 2157: unsigned T2OUTPS :4;
[; ;pic18f4520.h: 2158: };
[; ;pic18f4520.h: 2159: struct {
[; ;pic18f4520.h: 2160: unsigned T2CKPS0 :1;
[; ;pic18f4520.h: 2161: unsigned T2CKPS1 :1;
[; ;pic18f4520.h: 2162: unsigned :1;
[; ;pic18f4520.h: 2163: unsigned T2OUTPS0 :1;
[; ;pic18f4520.h: 2164: unsigned T2OUTPS1 :1;
[; ;pic18f4520.h: 2165: unsigned T2OUTPS2 :1;
[; ;pic18f4520.h: 2166: unsigned T2OUTPS3 :1;
[; ;pic18f4520.h: 2167: };
[; ;pic18f4520.h: 2168: struct {
[; ;pic18f4520.h: 2169: unsigned :3;
[; ;pic18f4520.h: 2170: unsigned TOUTPS0 :1;
[; ;pic18f4520.h: 2171: unsigned TOUTPS1 :1;
[; ;pic18f4520.h: 2172: unsigned TOUTPS2 :1;
[; ;pic18f4520.h: 2173: unsigned TOUTPS3 :1;
[; ;pic18f4520.h: 2174: };
[; ;pic18f4520.h: 2175: } T2CONbits @ 0xFCA;
[; ;pic18f4520.h: 2178: extern volatile unsigned char PR2 @ 0xFCB;
"2180
[; ;pic18f4520.h: 2180: asm("PR2 equ 0FCBh");
[; <" PR2 equ 0FCBh ;# ">
[; ;pic18f4520.h: 2183: extern volatile unsigned char MEMCON @ 0xFCB;
"2185
[; ;pic18f4520.h: 2185: asm("MEMCON equ 0FCBh");
[; <" MEMCON equ 0FCBh ;# ">
[; ;pic18f4520.h: 2188: extern volatile union {
[; ;pic18f4520.h: 2189: struct {
[; ;pic18f4520.h: 2190: unsigned PR2 :8;
[; ;pic18f4520.h: 2191: };
[; ;pic18f4520.h: 2192: } PR2bits @ 0xFCB;
[; ;pic18f4520.h: 2194: extern volatile union {
[; ;pic18f4520.h: 2195: struct {
[; ;pic18f4520.h: 2196: unsigned PR2 :8;
[; ;pic18f4520.h: 2197: };
[; ;pic18f4520.h: 2198: } MEMCONbits @ 0xFCB;
[; ;pic18f4520.h: 2201: extern volatile unsigned char TMR2 @ 0xFCC;
"2203
[; ;pic18f4520.h: 2203: asm("TMR2 equ 0FCCh");
[; <" TMR2 equ 0FCCh ;# ">
[; ;pic18f4520.h: 2206: extern volatile union {
[; ;pic18f4520.h: 2207: struct {
[; ;pic18f4520.h: 2208: unsigned TMR2 :8;
[; ;pic18f4520.h: 2209: };
[; ;pic18f4520.h: 2210: } TMR2bits @ 0xFCC;
[; ;pic18f4520.h: 2213: extern volatile unsigned char T1CON @ 0xFCD;
"2215
[; ;pic18f4520.h: 2215: asm("T1CON equ 0FCDh");
[; <" T1CON equ 0FCDh ;# ">
[; ;pic18f4520.h: 2218: extern volatile union {
[; ;pic18f4520.h: 2219: struct {
[; ;pic18f4520.h: 2220: unsigned :2;
[; ;pic18f4520.h: 2221: unsigned NOT_T1SYNC :1;
[; ;pic18f4520.h: 2222: };
[; ;pic18f4520.h: 2223: struct {
[; ;pic18f4520.h: 2224: unsigned TMR1ON :1;
[; ;pic18f4520.h: 2225: unsigned TMR1CS :1;
[; ;pic18f4520.h: 2226: unsigned nT1SYNC :1;
[; ;pic18f4520.h: 2227: unsigned T1OSCEN :1;
[; ;pic18f4520.h: 2228: unsigned T1CKPS :2;
[; ;pic18f4520.h: 2229: unsigned T1RUN :1;
[; ;pic18f4520.h: 2230: unsigned RD16 :1;
[; ;pic18f4520.h: 2231: };
[; ;pic18f4520.h: 2232: struct {
[; ;pic18f4520.h: 2233: unsigned :2;
[; ;pic18f4520.h: 2234: unsigned T1SYNC :1;
[; ;pic18f4520.h: 2235: unsigned :1;
[; ;pic18f4520.h: 2236: unsigned T1CKPS0 :1;
[; ;pic18f4520.h: 2237: unsigned T1CKPS1 :1;
[; ;pic18f4520.h: 2238: };
[; ;pic18f4520.h: 2239: struct {
[; ;pic18f4520.h: 2240: unsigned :3;
[; ;pic18f4520.h: 2241: unsigned SOSCEN :1;
[; ;pic18f4520.h: 2242: };
[; ;pic18f4520.h: 2243: struct {
[; ;pic18f4520.h: 2244: unsigned :7;
[; ;pic18f4520.h: 2245: unsigned T1RD16 :1;
[; ;pic18f4520.h: 2246: };
[; ;pic18f4520.h: 2247: } T1CONbits @ 0xFCD;
[; ;pic18f4520.h: 2250: extern volatile unsigned short TMR1 @ 0xFCE;
"2252
[; ;pic18f4520.h: 2252: asm("TMR1 equ 0FCEh");
[; <" TMR1 equ 0FCEh ;# ">
[; ;pic18f4520.h: 2255: extern volatile union {
[; ;pic18f4520.h: 2256: struct {
[; ;pic18f4520.h: 2257: unsigned TMR1 :16;
[; ;pic18f4520.h: 2258: };
[; ;pic18f4520.h: 2259: } TMR1bits @ 0xFCE;
[; ;pic18f4520.h: 2262: extern volatile unsigned char TMR1L @ 0xFCE;
"2264
[; ;pic18f4520.h: 2264: asm("TMR1L equ 0FCEh");
[; <" TMR1L equ 0FCEh ;# ">
[; ;pic18f4520.h: 2267: extern volatile union {
[; ;pic18f4520.h: 2268: struct {
[; ;pic18f4520.h: 2269: unsigned TMR1L :8;
[; ;pic18f4520.h: 2270: };
[; ;pic18f4520.h: 2271: } TMR1Lbits @ 0xFCE;
[; ;pic18f4520.h: 2274: extern volatile unsigned char TMR1H @ 0xFCF;
"2276
[; ;pic18f4520.h: 2276: asm("TMR1H equ 0FCFh");
[; <" TMR1H equ 0FCFh ;# ">
[; ;pic18f4520.h: 2279: extern volatile union {
[; ;pic18f4520.h: 2280: struct {
[; ;pic18f4520.h: 2281: unsigned TMR1H :8;
[; ;pic18f4520.h: 2282: };
[; ;pic18f4520.h: 2283: } TMR1Hbits @ 0xFCF;
[; ;pic18f4520.h: 2286: extern volatile unsigned char RCON @ 0xFD0;
"2288
[; ;pic18f4520.h: 2288: asm("RCON equ 0FD0h");
[; <" RCON equ 0FD0h ;# ">
[; ;pic18f4520.h: 2291: extern volatile union {
[; ;pic18f4520.h: 2292: struct {
[; ;pic18f4520.h: 2293: unsigned NOT_BOR :1;
[; ;pic18f4520.h: 2294: };
[; ;pic18f4520.h: 2295: struct {
[; ;pic18f4520.h: 2296: unsigned :1;
[; ;pic18f4520.h: 2297: unsigned NOT_POR :1;
[; ;pic18f4520.h: 2298: };
[; ;pic18f4520.h: 2299: struct {
[; ;pic18f4520.h: 2300: unsigned :2;
[; ;pic18f4520.h: 2301: unsigned NOT_PD :1;
[; ;pic18f4520.h: 2302: };
[; ;pic18f4520.h: 2303: struct {
[; ;pic18f4520.h: 2304: unsigned :3;
[; ;pic18f4520.h: 2305: unsigned NOT_TO :1;
[; ;pic18f4520.h: 2306: };
[; ;pic18f4520.h: 2307: struct {
[; ;pic18f4520.h: 2308: unsigned :4;
[; ;pic18f4520.h: 2309: unsigned NOT_RI :1;
[; ;pic18f4520.h: 2310: };
[; ;pic18f4520.h: 2311: struct {
[; ;pic18f4520.h: 2312: unsigned nBOR :1;
[; ;pic18f4520.h: 2313: unsigned nPOR :1;
[; ;pic18f4520.h: 2314: unsigned nPD :1;
[; ;pic18f4520.h: 2315: unsigned nTO :1;
[; ;pic18f4520.h: 2316: unsigned nRI :1;
[; ;pic18f4520.h: 2317: unsigned :1;
[; ;pic18f4520.h: 2318: unsigned SBOREN :1;
[; ;pic18f4520.h: 2319: unsigned IPEN :1;
[; ;pic18f4520.h: 2320: };
[; ;pic18f4520.h: 2321: struct {
[; ;pic18f4520.h: 2322: unsigned BOR :1;
[; ;pic18f4520.h: 2323: unsigned POR :1;
[; ;pic18f4520.h: 2324: unsigned PD :1;
[; ;pic18f4520.h: 2325: unsigned TO :1;
[; ;pic18f4520.h: 2326: unsigned RI :1;
[; ;pic18f4520.h: 2327: };
[; ;pic18f4520.h: 2328: } RCONbits @ 0xFD0;
[; ;pic18f4520.h: 2331: extern volatile unsigned char WDTCON @ 0xFD1;
"2333
[; ;pic18f4520.h: 2333: asm("WDTCON equ 0FD1h");
[; <" WDTCON equ 0FD1h ;# ">
[; ;pic18f4520.h: 2336: extern volatile union {
[; ;pic18f4520.h: 2337: struct {
[; ;pic18f4520.h: 2338: unsigned SWDTEN :1;
[; ;pic18f4520.h: 2339: };
[; ;pic18f4520.h: 2340: struct {
[; ;pic18f4520.h: 2341: unsigned SWDTE :1;
[; ;pic18f4520.h: 2342: };
[; ;pic18f4520.h: 2343: } WDTCONbits @ 0xFD1;
[; ;pic18f4520.h: 2346: extern volatile unsigned char HLVDCON @ 0xFD2;
"2348
[; ;pic18f4520.h: 2348: asm("HLVDCON equ 0FD2h");
[; <" HLVDCON equ 0FD2h ;# ">
[; ;pic18f4520.h: 2351: extern volatile unsigned char LVDCON @ 0xFD2;
"2353
[; ;pic18f4520.h: 2353: asm("LVDCON equ 0FD2h");
[; <" LVDCON equ 0FD2h ;# ">
[; ;pic18f4520.h: 2356: extern volatile union {
[; ;pic18f4520.h: 2357: struct {
[; ;pic18f4520.h: 2358: unsigned HLVDL :4;
[; ;pic18f4520.h: 2359: unsigned HLVDEN :1;
[; ;pic18f4520.h: 2360: unsigned IVRST :1;
[; ;pic18f4520.h: 2361: unsigned :1;
[; ;pic18f4520.h: 2362: unsigned VDIRMAG :1;
[; ;pic18f4520.h: 2363: };
[; ;pic18f4520.h: 2364: struct {
[; ;pic18f4520.h: 2365: unsigned HLVDL0 :1;
[; ;pic18f4520.h: 2366: unsigned HLVDL1 :1;
[; ;pic18f4520.h: 2367: unsigned HLVDL2 :1;
[; ;pic18f4520.h: 2368: unsigned HLVDL3 :1;
[; ;pic18f4520.h: 2369: };
[; ;pic18f4520.h: 2370: struct {
[; ;pic18f4520.h: 2371: unsigned LVDL0 :1;
[; ;pic18f4520.h: 2372: unsigned LVDL1 :1;
[; ;pic18f4520.h: 2373: unsigned LVDL2 :1;
[; ;pic18f4520.h: 2374: unsigned LVDL3 :1;
[; ;pic18f4520.h: 2375: unsigned LVDEN :1;
[; ;pic18f4520.h: 2376: unsigned IRVST :1;
[; ;pic18f4520.h: 2377: };
[; ;pic18f4520.h: 2378: struct {
[; ;pic18f4520.h: 2379: unsigned LVV0 :1;
[; ;pic18f4520.h: 2380: unsigned LVV1 :1;
[; ;pic18f4520.h: 2381: unsigned LVV2 :1;
[; ;pic18f4520.h: 2382: unsigned LVV3 :1;
[; ;pic18f4520.h: 2383: unsigned :1;
[; ;pic18f4520.h: 2384: unsigned BGST :1;
[; ;pic18f4520.h: 2385: };
[; ;pic18f4520.h: 2386: } HLVDCONbits @ 0xFD2;
[; ;pic18f4520.h: 2388: extern volatile union {
[; ;pic18f4520.h: 2389: struct {
[; ;pic18f4520.h: 2390: unsigned HLVDL :4;
[; ;pic18f4520.h: 2391: unsigned HLVDEN :1;
[; ;pic18f4520.h: 2392: unsigned IVRST :1;
[; ;pic18f4520.h: 2393: unsigned :1;
[; ;pic18f4520.h: 2394: unsigned VDIRMAG :1;
[; ;pic18f4520.h: 2395: };
[; ;pic18f4520.h: 2396: struct {
[; ;pic18f4520.h: 2397: unsigned HLVDL0 :1;
[; ;pic18f4520.h: 2398: unsigned HLVDL1 :1;
[; ;pic18f4520.h: 2399: unsigned HLVDL2 :1;
[; ;pic18f4520.h: 2400: unsigned HLVDL3 :1;
[; ;pic18f4520.h: 2401: };
[; ;pic18f4520.h: 2402: struct {
[; ;pic18f4520.h: 2403: unsigned LVDL0 :1;
[; ;pic18f4520.h: 2404: unsigned LVDL1 :1;
[; ;pic18f4520.h: 2405: unsigned LVDL2 :1;
[; ;pic18f4520.h: 2406: unsigned LVDL3 :1;
[; ;pic18f4520.h: 2407: unsigned LVDEN :1;
[; ;pic18f4520.h: 2408: unsigned IRVST :1;
[; ;pic18f4520.h: 2409: };
[; ;pic18f4520.h: 2410: struct {
[; ;pic18f4520.h: 2411: unsigned LVV0 :1;
[; ;pic18f4520.h: 2412: unsigned LVV1 :1;
[; ;pic18f4520.h: 2413: unsigned LVV2 :1;
[; ;pic18f4520.h: 2414: unsigned LVV3 :1;
[; ;pic18f4520.h: 2415: unsigned :1;
[; ;pic18f4520.h: 2416: unsigned BGST :1;
[; ;pic18f4520.h: 2417: };
[; ;pic18f4520.h: 2418: } LVDCONbits @ 0xFD2;
[; ;pic18f4520.h: 2421: extern volatile unsigned char OSCCON @ 0xFD3;
"2423
[; ;pic18f4520.h: 2423: asm("OSCCON equ 0FD3h");
[; <" OSCCON equ 0FD3h ;# ">
[; ;pic18f4520.h: 2426: extern volatile union {
[; ;pic18f4520.h: 2427: struct {
[; ;pic18f4520.h: 2428: unsigned SCS :2;
[; ;pic18f4520.h: 2429: unsigned IOFS :1;
[; ;pic18f4520.h: 2430: unsigned OSTS :1;
[; ;pic18f4520.h: 2431: unsigned IRCF :3;
[; ;pic18f4520.h: 2432: unsigned IDLEN :1;
[; ;pic18f4520.h: 2433: };
[; ;pic18f4520.h: 2434: struct {
[; ;pic18f4520.h: 2435: unsigned SCS0 :1;
[; ;pic18f4520.h: 2436: unsigned SCS1 :1;
[; ;pic18f4520.h: 2437: unsigned FLTS :1;
[; ;pic18f4520.h: 2438: unsigned :1;
[; ;pic18f4520.h: 2439: unsigned IRCF0 :1;
[; ;pic18f4520.h: 2440: unsigned IRCF1 :1;
[; ;pic18f4520.h: 2441: unsigned IRCF2 :1;
[; ;pic18f4520.h: 2442: };
[; ;pic18f4520.h: 2443: } OSCCONbits @ 0xFD3;
[; ;pic18f4520.h: 2446: extern volatile unsigned char T0CON @ 0xFD5;
"2448
[; ;pic18f4520.h: 2448: asm("T0CON equ 0FD5h");
[; <" T0CON equ 0FD5h ;# ">
[; ;pic18f4520.h: 2451: extern volatile union {
[; ;pic18f4520.h: 2452: struct {
[; ;pic18f4520.h: 2453: unsigned T0PS :3;
[; ;pic18f4520.h: 2454: unsigned PSA :1;
[; ;pic18f4520.h: 2455: unsigned T0SE :1;
[; ;pic18f4520.h: 2456: unsigned T0CS :1;
[; ;pic18f4520.h: 2457: unsigned T08BIT :1;
[; ;pic18f4520.h: 2458: unsigned TMR0ON :1;
[; ;pic18f4520.h: 2459: };
[; ;pic18f4520.h: 2460: struct {
[; ;pic18f4520.h: 2461: unsigned T0PS0 :1;
[; ;pic18f4520.h: 2462: unsigned T0PS1 :1;
[; ;pic18f4520.h: 2463: unsigned T0PS2 :1;
[; ;pic18f4520.h: 2464: unsigned T0PS3 :1;
[; ;pic18f4520.h: 2465: unsigned :2;
[; ;pic18f4520.h: 2466: unsigned T016BIT :1;
[; ;pic18f4520.h: 2467: };
[; ;pic18f4520.h: 2468: } T0CONbits @ 0xFD5;
[; ;pic18f4520.h: 2471: extern volatile unsigned short TMR0 @ 0xFD6;
"2473
[; ;pic18f4520.h: 2473: asm("TMR0 equ 0FD6h");
[; <" TMR0 equ 0FD6h ;# ">
[; ;pic18f4520.h: 2476: extern volatile union {
[; ;pic18f4520.h: 2477: struct {
[; ;pic18f4520.h: 2478: unsigned TMR0 :16;
[; ;pic18f4520.h: 2479: };
[; ;pic18f4520.h: 2480: } TMR0bits @ 0xFD6;
[; ;pic18f4520.h: 2483: extern volatile unsigned char TMR0L @ 0xFD6;
"2485
[; ;pic18f4520.h: 2485: asm("TMR0L equ 0FD6h");
[; <" TMR0L equ 0FD6h ;# ">
[; ;pic18f4520.h: 2488: extern volatile union {
[; ;pic18f4520.h: 2489: struct {
[; ;pic18f4520.h: 2490: unsigned TMR0L :8;
[; ;pic18f4520.h: 2491: };
[; ;pic18f4520.h: 2492: } TMR0Lbits @ 0xFD6;
[; ;pic18f4520.h: 2495: extern volatile unsigned char TMR0H @ 0xFD7;
"2497
[; ;pic18f4520.h: 2497: asm("TMR0H equ 0FD7h");
[; <" TMR0H equ 0FD7h ;# ">
[; ;pic18f4520.h: 2500: extern volatile union {
[; ;pic18f4520.h: 2501: struct {
[; ;pic18f4520.h: 2502: unsigned TMR0H :8;
[; ;pic18f4520.h: 2503: };
[; ;pic18f4520.h: 2504: } TMR0Hbits @ 0xFD7;
[; ;pic18f4520.h: 2507: extern volatile unsigned char STATUS @ 0xFD8;
"2509
[; ;pic18f4520.h: 2509: asm("STATUS equ 0FD8h");
[; <" STATUS equ 0FD8h ;# ">
[; ;pic18f4520.h: 2512: extern volatile union {
[; ;pic18f4520.h: 2513: struct {
[; ;pic18f4520.h: 2514: unsigned C :1;
[; ;pic18f4520.h: 2515: unsigned DC :1;
[; ;pic18f4520.h: 2516: unsigned Z :1;
[; ;pic18f4520.h: 2517: unsigned OV :1;
[; ;pic18f4520.h: 2518: unsigned N :1;
[; ;pic18f4520.h: 2519: };
[; ;pic18f4520.h: 2520: struct {
[; ;pic18f4520.h: 2521: unsigned CARRY :1;
[; ;pic18f4520.h: 2522: };
[; ;pic18f4520.h: 2523: struct {
[; ;pic18f4520.h: 2524: unsigned :4;
[; ;pic18f4520.h: 2525: unsigned NEGATIVE :1;
[; ;pic18f4520.h: 2526: };
[; ;pic18f4520.h: 2527: struct {
[; ;pic18f4520.h: 2528: unsigned :3;
[; ;pic18f4520.h: 2529: unsigned OVERFLOW :1;
[; ;pic18f4520.h: 2530: };
[; ;pic18f4520.h: 2531: struct {
[; ;pic18f4520.h: 2532: unsigned :2;
[; ;pic18f4520.h: 2533: unsigned ZERO :1;
[; ;pic18f4520.h: 2534: };
[; ;pic18f4520.h: 2535: } STATUSbits @ 0xFD8;
[; ;pic18f4520.h: 2538: extern volatile unsigned short FSR2 @ 0xFD9;
"2540
[; ;pic18f4520.h: 2540: asm("FSR2 equ 0FD9h");
[; <" FSR2 equ 0FD9h ;# ">
[; ;pic18f4520.h: 2543: extern volatile union {
[; ;pic18f4520.h: 2544: struct {
[; ;pic18f4520.h: 2545: unsigned FSR2 :12;
[; ;pic18f4520.h: 2546: };
[; ;pic18f4520.h: 2547: } FSR2bits @ 0xFD9;
[; ;pic18f4520.h: 2550: extern volatile unsigned char FSR2L @ 0xFD9;
"2552
[; ;pic18f4520.h: 2552: asm("FSR2L equ 0FD9h");
[; <" FSR2L equ 0FD9h ;# ">
[; ;pic18f4520.h: 2555: extern volatile union {
[; ;pic18f4520.h: 2556: struct {
[; ;pic18f4520.h: 2557: unsigned FSR2L :8;
[; ;pic18f4520.h: 2558: };
[; ;pic18f4520.h: 2559: } FSR2Lbits @ 0xFD9;
[; ;pic18f4520.h: 2562: extern volatile unsigned char FSR2H @ 0xFDA;
"2564
[; ;pic18f4520.h: 2564: asm("FSR2H equ 0FDAh");
[; <" FSR2H equ 0FDAh ;# ">
[; ;pic18f4520.h: 2567: extern volatile union {
[; ;pic18f4520.h: 2568: struct {
[; ;pic18f4520.h: 2569: unsigned FSR2H :4;
[; ;pic18f4520.h: 2570: };
[; ;pic18f4520.h: 2571: } FSR2Hbits @ 0xFDA;
[; ;pic18f4520.h: 2574: extern volatile unsigned char PLUSW2 @ 0xFDB;
"2576
[; ;pic18f4520.h: 2576: asm("PLUSW2 equ 0FDBh");
[; <" PLUSW2 equ 0FDBh ;# ">
[; ;pic18f4520.h: 2579: extern volatile union {
[; ;pic18f4520.h: 2580: struct {
[; ;pic18f4520.h: 2581: unsigned PLUSW2 :8;
[; ;pic18f4520.h: 2582: };
[; ;pic18f4520.h: 2583: } PLUSW2bits @ 0xFDB;
[; ;pic18f4520.h: 2586: extern volatile unsigned char PREINC2 @ 0xFDC;
"2588
[; ;pic18f4520.h: 2588: asm("PREINC2 equ 0FDCh");
[; <" PREINC2 equ 0FDCh ;# ">
[; ;pic18f4520.h: 2591: extern volatile union {
[; ;pic18f4520.h: 2592: struct {
[; ;pic18f4520.h: 2593: unsigned PREINC2 :8;
[; ;pic18f4520.h: 2594: };
[; ;pic18f4520.h: 2595: } PREINC2bits @ 0xFDC;
[; ;pic18f4520.h: 2598: extern volatile unsigned char POSTDEC2 @ 0xFDD;
"2600
[; ;pic18f4520.h: 2600: asm("POSTDEC2 equ 0FDDh");
[; <" POSTDEC2 equ 0FDDh ;# ">
[; ;pic18f4520.h: 2603: extern volatile union {
[; ;pic18f4520.h: 2604: struct {
[; ;pic18f4520.h: 2605: unsigned POSTDEC2 :8;
[; ;pic18f4520.h: 2606: };
[; ;pic18f4520.h: 2607: } POSTDEC2bits @ 0xFDD;
[; ;pic18f4520.h: 2610: extern volatile unsigned char POSTINC2 @ 0xFDE;
"2612
[; ;pic18f4520.h: 2612: asm("POSTINC2 equ 0FDEh");
[; <" POSTINC2 equ 0FDEh ;# ">
[; ;pic18f4520.h: 2615: extern volatile union {
[; ;pic18f4520.h: 2616: struct {
[; ;pic18f4520.h: 2617: unsigned POSTINC2 :8;
[; ;pic18f4520.h: 2618: };
[; ;pic18f4520.h: 2619: } POSTINC2bits @ 0xFDE;
[; ;pic18f4520.h: 2622: extern volatile unsigned char INDF2 @ 0xFDF;
"2624
[; ;pic18f4520.h: 2624: asm("INDF2 equ 0FDFh");
[; <" INDF2 equ 0FDFh ;# ">
[; ;pic18f4520.h: 2627: extern volatile union {
[; ;pic18f4520.h: 2628: struct {
[; ;pic18f4520.h: 2629: unsigned INDF2 :8;
[; ;pic18f4520.h: 2630: };
[; ;pic18f4520.h: 2631: } INDF2bits @ 0xFDF;
[; ;pic18f4520.h: 2634: extern volatile unsigned char BSR @ 0xFE0;
"2636
[; ;pic18f4520.h: 2636: asm("BSR equ 0FE0h");
[; <" BSR equ 0FE0h ;# ">
[; ;pic18f4520.h: 2639: extern volatile union {
[; ;pic18f4520.h: 2640: struct {
[; ;pic18f4520.h: 2641: unsigned BSR :4;
[; ;pic18f4520.h: 2642: };
[; ;pic18f4520.h: 2643: } BSRbits @ 0xFE0;
[; ;pic18f4520.h: 2646: extern volatile unsigned short FSR1 @ 0xFE1;
"2648
[; ;pic18f4520.h: 2648: asm("FSR1 equ 0FE1h");
[; <" FSR1 equ 0FE1h ;# ">
[; ;pic18f4520.h: 2651: extern volatile union {
[; ;pic18f4520.h: 2652: struct {
[; ;pic18f4520.h: 2653: unsigned FSR1 :12;
[; ;pic18f4520.h: 2654: };
[; ;pic18f4520.h: 2655: } FSR1bits @ 0xFE1;
[; ;pic18f4520.h: 2658: extern volatile unsigned char FSR1L @ 0xFE1;
"2660
[; ;pic18f4520.h: 2660: asm("FSR1L equ 0FE1h");
[; <" FSR1L equ 0FE1h ;# ">
[; ;pic18f4520.h: 2663: extern volatile union {
[; ;pic18f4520.h: 2664: struct {
[; ;pic18f4520.h: 2665: unsigned FSR1L :8;
[; ;pic18f4520.h: 2666: };
[; ;pic18f4520.h: 2667: } FSR1Lbits @ 0xFE1;
[; ;pic18f4520.h: 2670: extern volatile unsigned char FSR1H @ 0xFE2;
"2672
[; ;pic18f4520.h: 2672: asm("FSR1H equ 0FE2h");
[; <" FSR1H equ 0FE2h ;# ">
[; ;pic18f4520.h: 2675: extern volatile union {
[; ;pic18f4520.h: 2676: struct {
[; ;pic18f4520.h: 2677: unsigned FSR1H :4;
[; ;pic18f4520.h: 2678: };
[; ;pic18f4520.h: 2679: } FSR1Hbits @ 0xFE2;
[; ;pic18f4520.h: 2682: extern volatile unsigned char PLUSW1 @ 0xFE3;
"2684
[; ;pic18f4520.h: 2684: asm("PLUSW1 equ 0FE3h");
[; <" PLUSW1 equ 0FE3h ;# ">
[; ;pic18f4520.h: 2687: extern volatile union {
[; ;pic18f4520.h: 2688: struct {
[; ;pic18f4520.h: 2689: unsigned PLUSW1 :8;
[; ;pic18f4520.h: 2690: };
[; ;pic18f4520.h: 2691: } PLUSW1bits @ 0xFE3;
[; ;pic18f4520.h: 2694: extern volatile unsigned char PREINC1 @ 0xFE4;
"2696
[; ;pic18f4520.h: 2696: asm("PREINC1 equ 0FE4h");
[; <" PREINC1 equ 0FE4h ;# ">
[; ;pic18f4520.h: 2699: extern volatile union {
[; ;pic18f4520.h: 2700: struct {
[; ;pic18f4520.h: 2701: unsigned PREINC1 :8;
[; ;pic18f4520.h: 2702: };
[; ;pic18f4520.h: 2703: } PREINC1bits @ 0xFE4;
[; ;pic18f4520.h: 2706: extern volatile unsigned char POSTDEC1 @ 0xFE5;
"2708
[; ;pic18f4520.h: 2708: asm("POSTDEC1 equ 0FE5h");
[; <" POSTDEC1 equ 0FE5h ;# ">
[; ;pic18f4520.h: 2711: extern volatile union {
[; ;pic18f4520.h: 2712: struct {
[; ;pic18f4520.h: 2713: unsigned POSTDEC1 :8;
[; ;pic18f4520.h: 2714: };
[; ;pic18f4520.h: 2715: } POSTDEC1bits @ 0xFE5;
[; ;pic18f4520.h: 2718: extern volatile unsigned char POSTINC1 @ 0xFE6;
"2720
[; ;pic18f4520.h: 2720: asm("POSTINC1 equ 0FE6h");
[; <" POSTINC1 equ 0FE6h ;# ">
[; ;pic18f4520.h: 2723: extern volatile union {
[; ;pic18f4520.h: 2724: struct {
[; ;pic18f4520.h: 2725: unsigned POSTINC1 :8;
[; ;pic18f4520.h: 2726: };
[; ;pic18f4520.h: 2727: } POSTINC1bits @ 0xFE6;
[; ;pic18f4520.h: 2730: extern volatile unsigned char INDF1 @ 0xFE7;
"2732
[; ;pic18f4520.h: 2732: asm("INDF1 equ 0FE7h");
[; <" INDF1 equ 0FE7h ;# ">
[; ;pic18f4520.h: 2735: extern volatile union {
[; ;pic18f4520.h: 2736: struct {
[; ;pic18f4520.h: 2737: unsigned INDF1 :8;
[; ;pic18f4520.h: 2738: };
[; ;pic18f4520.h: 2739: } INDF1bits @ 0xFE7;
[; ;pic18f4520.h: 2742: extern volatile unsigned char WREG @ 0xFE8;
"2744
[; ;pic18f4520.h: 2744: asm("WREG equ 0FE8h");
[; <" WREG equ 0FE8h ;# ">
[; ;pic18f4520.h: 2752: extern volatile union {
[; ;pic18f4520.h: 2753: struct {
[; ;pic18f4520.h: 2754: unsigned WREG :8;
[; ;pic18f4520.h: 2755: };
[; ;pic18f4520.h: 2756: } WREGbits @ 0xFE8;
[; ;pic18f4520.h: 2758: extern volatile union {
[; ;pic18f4520.h: 2759: struct {
[; ;pic18f4520.h: 2760: unsigned WREG :8;
[; ;pic18f4520.h: 2761: };
[; ;pic18f4520.h: 2762: } Wbits @ 0xFE8;
[; ;pic18f4520.h: 2765: extern volatile unsigned short FSR0 @ 0xFE9;
"2767
[; ;pic18f4520.h: 2767: asm("FSR0 equ 0FE9h");
[; <" FSR0 equ 0FE9h ;# ">
[; ;pic18f4520.h: 2770: extern volatile union {
[; ;pic18f4520.h: 2771: struct {
[; ;pic18f4520.h: 2772: unsigned FSR0 :12;
[; ;pic18f4520.h: 2773: };
[; ;pic18f4520.h: 2774: } FSR0bits @ 0xFE9;
[; ;pic18f4520.h: 2777: extern volatile unsigned char FSR0L @ 0xFE9;
"2779
[; ;pic18f4520.h: 2779: asm("FSR0L equ 0FE9h");
[; <" FSR0L equ 0FE9h ;# ">
[; ;pic18f4520.h: 2782: extern volatile union {
[; ;pic18f4520.h: 2783: struct {
[; ;pic18f4520.h: 2784: unsigned FSR0L :8;
[; ;pic18f4520.h: 2785: };
[; ;pic18f4520.h: 2786: } FSR0Lbits @ 0xFE9;
[; ;pic18f4520.h: 2789: extern volatile unsigned char FSR0H @ 0xFEA;
"2791
[; ;pic18f4520.h: 2791: asm("FSR0H equ 0FEAh");
[; <" FSR0H equ 0FEAh ;# ">
[; ;pic18f4520.h: 2794: extern volatile union {
[; ;pic18f4520.h: 2795: struct {
[; ;pic18f4520.h: 2796: unsigned FSR0H :4;
[; ;pic18f4520.h: 2797: };
[; ;pic18f4520.h: 2798: } FSR0Hbits @ 0xFEA;
[; ;pic18f4520.h: 2801: extern volatile unsigned char PLUSW0 @ 0xFEB;
"2803
[; ;pic18f4520.h: 2803: asm("PLUSW0 equ 0FEBh");
[; <" PLUSW0 equ 0FEBh ;# ">
[; ;pic18f4520.h: 2806: extern volatile union {
[; ;pic18f4520.h: 2807: struct {
[; ;pic18f4520.h: 2808: unsigned PLUSW0 :8;
[; ;pic18f4520.h: 2809: };
[; ;pic18f4520.h: 2810: } PLUSW0bits @ 0xFEB;
[; ;pic18f4520.h: 2813: extern volatile unsigned char PREINC0 @ 0xFEC;
"2815
[; ;pic18f4520.h: 2815: asm("PREINC0 equ 0FECh");
[; <" PREINC0 equ 0FECh ;# ">
[; ;pic18f4520.h: 2818: extern volatile union {
[; ;pic18f4520.h: 2819: struct {
[; ;pic18f4520.h: 2820: unsigned PREINC0 :8;
[; ;pic18f4520.h: 2821: };
[; ;pic18f4520.h: 2822: } PREINC0bits @ 0xFEC;
[; ;pic18f4520.h: 2825: extern volatile unsigned char POSTDEC0 @ 0xFED;
"2827
[; ;pic18f4520.h: 2827: asm("POSTDEC0 equ 0FEDh");
[; <" POSTDEC0 equ 0FEDh ;# ">
[; ;pic18f4520.h: 2830: extern volatile union {
[; ;pic18f4520.h: 2831: struct {
[; ;pic18f4520.h: 2832: unsigned POSTDEC0 :8;
[; ;pic18f4520.h: 2833: };
[; ;pic18f4520.h: 2834: } POSTDEC0bits @ 0xFED;
[; ;pic18f4520.h: 2837: extern volatile unsigned char POSTINC0 @ 0xFEE;
"2839
[; ;pic18f4520.h: 2839: asm("POSTINC0 equ 0FEEh");
[; <" POSTINC0 equ 0FEEh ;# ">
[; ;pic18f4520.h: 2842: extern volatile union {
[; ;pic18f4520.h: 2843: struct {
[; ;pic18f4520.h: 2844: unsigned POSTINC0 :8;
[; ;pic18f4520.h: 2845: };
[; ;pic18f4520.h: 2846: } POSTINC0bits @ 0xFEE;
[; ;pic18f4520.h: 2849: extern volatile unsigned char INDF0 @ 0xFEF;
"2851
[; ;pic18f4520.h: 2851: asm("INDF0 equ 0FEFh");
[; <" INDF0 equ 0FEFh ;# ">
[; ;pic18f4520.h: 2854: extern volatile union {
[; ;pic18f4520.h: 2855: struct {
[; ;pic18f4520.h: 2856: unsigned INDF0 :8;
[; ;pic18f4520.h: 2857: };
[; ;pic18f4520.h: 2858: } INDF0bits @ 0xFEF;
[; ;pic18f4520.h: 2861: extern volatile unsigned char INTCON3 @ 0xFF0;
"2863
[; ;pic18f4520.h: 2863: asm("INTCON3 equ 0FF0h");
[; <" INTCON3 equ 0FF0h ;# ">
[; ;pic18f4520.h: 2866: extern volatile union {
[; ;pic18f4520.h: 2867: struct {
[; ;pic18f4520.h: 2868: unsigned INT1IF :1;
[; ;pic18f4520.h: 2869: unsigned INT2IF :1;
[; ;pic18f4520.h: 2870: unsigned :1;
[; ;pic18f4520.h: 2871: unsigned INT1IE :1;
[; ;pic18f4520.h: 2872: unsigned INT2IE :1;
[; ;pic18f4520.h: 2873: unsigned :1;
[; ;pic18f4520.h: 2874: unsigned INT1IP :1;
[; ;pic18f4520.h: 2875: unsigned INT2IP :1;
[; ;pic18f4520.h: 2876: };
[; ;pic18f4520.h: 2877: struct {
[; ;pic18f4520.h: 2878: unsigned INT1F :1;
[; ;pic18f4520.h: 2879: unsigned INT2F :1;
[; ;pic18f4520.h: 2880: unsigned :1;
[; ;pic18f4520.h: 2881: unsigned INT1E :1;
[; ;pic18f4520.h: 2882: unsigned INT2E :1;
[; ;pic18f4520.h: 2883: unsigned :1;
[; ;pic18f4520.h: 2884: unsigned INT1P :1;
[; ;pic18f4520.h: 2885: unsigned INT2P :1;
[; ;pic18f4520.h: 2886: };
[; ;pic18f4520.h: 2887: } INTCON3bits @ 0xFF0;
[; ;pic18f4520.h: 2890: extern volatile unsigned char INTCON2 @ 0xFF1;
"2892
[; ;pic18f4520.h: 2892: asm("INTCON2 equ 0FF1h");
[; <" INTCON2 equ 0FF1h ;# ">
[; ;pic18f4520.h: 2895: extern volatile union {
[; ;pic18f4520.h: 2896: struct {
[; ;pic18f4520.h: 2897: unsigned :7;
[; ;pic18f4520.h: 2898: unsigned NOT_RBPU :1;
[; ;pic18f4520.h: 2899: };
[; ;pic18f4520.h: 2900: struct {
[; ;pic18f4520.h: 2901: unsigned RBIP :1;
[; ;pic18f4520.h: 2902: unsigned :1;
[; ;pic18f4520.h: 2903: unsigned TMR0IP :1;
[; ;pic18f4520.h: 2904: unsigned :1;
[; ;pic18f4520.h: 2905: unsigned INTEDG2 :1;
[; ;pic18f4520.h: 2906: unsigned INTEDG1 :1;
[; ;pic18f4520.h: 2907: unsigned INTEDG0 :1;
[; ;pic18f4520.h: 2908: unsigned nRBPU :1;
[; ;pic18f4520.h: 2909: };
[; ;pic18f4520.h: 2910: struct {
[; ;pic18f4520.h: 2911: unsigned :7;
[; ;pic18f4520.h: 2912: unsigned RBPU :1;
[; ;pic18f4520.h: 2913: };
[; ;pic18f4520.h: 2914: } INTCON2bits @ 0xFF1;
[; ;pic18f4520.h: 2917: extern volatile unsigned char INTCON @ 0xFF2;
"2919
[; ;pic18f4520.h: 2919: asm("INTCON equ 0FF2h");
[; <" INTCON equ 0FF2h ;# ">
[; ;pic18f4520.h: 2922: extern volatile union {
[; ;pic18f4520.h: 2923: struct {
[; ;pic18f4520.h: 2924: unsigned RBIF :1;
[; ;pic18f4520.h: 2925: unsigned INT0IF :1;
[; ;pic18f4520.h: 2926: unsigned TMR0IF :1;
[; ;pic18f4520.h: 2927: unsigned RBIE :1;
[; ;pic18f4520.h: 2928: unsigned INT0IE :1;
[; ;pic18f4520.h: 2929: unsigned TMR0IE :1;
[; ;pic18f4520.h: 2930: unsigned PEIE_GIEL :1;
[; ;pic18f4520.h: 2931: unsigned GIE_GIEH :1;
[; ;pic18f4520.h: 2932: };
[; ;pic18f4520.h: 2933: struct {
[; ;pic18f4520.h: 2934: unsigned RBIF :1;
[; ;pic18f4520.h: 2935: unsigned INT0IF :1;
[; ;pic18f4520.h: 2936: unsigned TMR0IF :1;
[; ;pic18f4520.h: 2937: unsigned RBIE :1;
[; ;pic18f4520.h: 2938: unsigned INT0IE :1;
[; ;pic18f4520.h: 2939: unsigned TMR0IE :1;
[; ;pic18f4520.h: 2940: unsigned PEIE :1;
[; ;pic18f4520.h: 2941: unsigned GIE :1;
[; ;pic18f4520.h: 2942: };
[; ;pic18f4520.h: 2943: struct {
[; ;pic18f4520.h: 2944: unsigned RBIF :1;
[; ;pic18f4520.h: 2945: unsigned INT0IF :1;
[; ;pic18f4520.h: 2946: unsigned TMR0IF :1;
[; ;pic18f4520.h: 2947: unsigned RBIE :1;
[; ;pic18f4520.h: 2948: unsigned INT0IE :1;
[; ;pic18f4520.h: 2949: unsigned TMR0IE :1;
[; ;pic18f4520.h: 2950: unsigned GIEL :1;
[; ;pic18f4520.h: 2951: unsigned GIEH :1;
[; ;pic18f4520.h: 2952: };
[; ;pic18f4520.h: 2953: struct {
[; ;pic18f4520.h: 2954: unsigned RBIF :1;
[; ;pic18f4520.h: 2955: unsigned INT0IF :1;
[; ;pic18f4520.h: 2956: unsigned TMR0IF :1;
[; ;pic18f4520.h: 2957: unsigned RBIE :1;
[; ;pic18f4520.h: 2958: unsigned INT0IE :1;
[; ;pic18f4520.h: 2959: unsigned TMR0IE :1;
[; ;pic18f4520.h: 2960: unsigned PEIE_GIEL :1;
[; ;pic18f4520.h: 2961: unsigned GIE_GIEH :1;
[; ;pic18f4520.h: 2962: };
[; ;pic18f4520.h: 2963: struct {
[; ;pic18f4520.h: 2964: unsigned :1;
[; ;pic18f4520.h: 2965: unsigned INT0F :1;
[; ;pic18f4520.h: 2966: unsigned T0IF :1;
[; ;pic18f4520.h: 2967: unsigned :1;
[; ;pic18f4520.h: 2968: unsigned INT0E :1;
[; ;pic18f4520.h: 2969: unsigned T0IE :1;
[; ;pic18f4520.h: 2970: unsigned PEIE :1;
[; ;pic18f4520.h: 2971: unsigned GIE :1;
[; ;pic18f4520.h: 2972: };
[; ;pic18f4520.h: 2973: struct {
[; ;pic18f4520.h: 2974: unsigned :6;
[; ;pic18f4520.h: 2975: unsigned GIEL :1;
[; ;pic18f4520.h: 2976: unsigned GIEH :1;
[; ;pic18f4520.h: 2977: };
[; ;pic18f4520.h: 2978: } INTCONbits @ 0xFF2;
[; ;pic18f4520.h: 2981: extern volatile unsigned short PROD @ 0xFF3;
"2983
[; ;pic18f4520.h: 2983: asm("PROD equ 0FF3h");
[; <" PROD equ 0FF3h ;# ">
[; ;pic18f4520.h: 2986: extern volatile union {
[; ;pic18f4520.h: 2987: struct {
[; ;pic18f4520.h: 2988: unsigned PROD :16;
[; ;pic18f4520.h: 2989: };
[; ;pic18f4520.h: 2990: } PRODbits @ 0xFF3;
[; ;pic18f4520.h: 2993: extern volatile unsigned char PRODL @ 0xFF3;
"2995
[; ;pic18f4520.h: 2995: asm("PRODL equ 0FF3h");
[; <" PRODL equ 0FF3h ;# ">
[; ;pic18f4520.h: 2998: extern volatile union {
[; ;pic18f4520.h: 2999: struct {
[; ;pic18f4520.h: 3000: unsigned PRODL :8;
[; ;pic18f4520.h: 3001: };
[; ;pic18f4520.h: 3002: } PRODLbits @ 0xFF3;
[; ;pic18f4520.h: 3005: extern volatile unsigned char PRODH @ 0xFF4;
"3007
[; ;pic18f4520.h: 3007: asm("PRODH equ 0FF4h");
[; <" PRODH equ 0FF4h ;# ">
[; ;pic18f4520.h: 3010: extern volatile union {
[; ;pic18f4520.h: 3011: struct {
[; ;pic18f4520.h: 3012: unsigned PRODH :8;
[; ;pic18f4520.h: 3013: };
[; ;pic18f4520.h: 3014: } PRODHbits @ 0xFF4;
[; ;pic18f4520.h: 3017: extern volatile unsigned char TABLAT @ 0xFF5;
"3019
[; ;pic18f4520.h: 3019: asm("TABLAT equ 0FF5h");
[; <" TABLAT equ 0FF5h ;# ">
[; ;pic18f4520.h: 3022: extern volatile union {
[; ;pic18f4520.h: 3023: struct {
[; ;pic18f4520.h: 3024: unsigned TABLAT :8;
[; ;pic18f4520.h: 3025: };
[; ;pic18f4520.h: 3026: } TABLATbits @ 0xFF5;
[; ;pic18f4520.h: 3029: extern volatile unsigned short long TBLPTR @ 0xFF6;
"3031
[; ;pic18f4520.h: 3031: asm("TBLPTR equ 0FF6h");
[; <" TBLPTR equ 0FF6h ;# ">
[; ;pic18f4520.h: 3034: extern volatile union {
[; ;pic18f4520.h: 3035: struct {
[; ;pic18f4520.h: 3036: unsigned TBLPTR :21;
[; ;pic18f4520.h: 3037: unsigned ACSS :1;
[; ;pic18f4520.h: 3038: };
[; ;pic18f4520.h: 3039: } TBLPTRbits @ 0xFF6;
[; ;pic18f4520.h: 3042: extern volatile unsigned char TBLPTRL @ 0xFF6;
"3044
[; ;pic18f4520.h: 3044: asm("TBLPTRL equ 0FF6h");
[; <" TBLPTRL equ 0FF6h ;# ">
[; ;pic18f4520.h: 3047: extern volatile union {
[; ;pic18f4520.h: 3048: struct {
[; ;pic18f4520.h: 3049: unsigned TBLPTRL :8;
[; ;pic18f4520.h: 3050: };
[; ;pic18f4520.h: 3051: } TBLPTRLbits @ 0xFF6;
[; ;pic18f4520.h: 3054: extern volatile unsigned char TBLPTRH @ 0xFF7;
"3056
[; ;pic18f4520.h: 3056: asm("TBLPTRH equ 0FF7h");
[; <" TBLPTRH equ 0FF7h ;# ">
[; ;pic18f4520.h: 3059: extern volatile union {
[; ;pic18f4520.h: 3060: struct {
[; ;pic18f4520.h: 3061: unsigned TBLPTRH :8;
[; ;pic18f4520.h: 3062: };
[; ;pic18f4520.h: 3063: } TBLPTRHbits @ 0xFF7;
[; ;pic18f4520.h: 3066: extern volatile unsigned char TBLPTRU @ 0xFF8;
"3068
[; ;pic18f4520.h: 3068: asm("TBLPTRU equ 0FF8h");
[; <" TBLPTRU equ 0FF8h ;# ">
[; ;pic18f4520.h: 3071: extern volatile union {
[; ;pic18f4520.h: 3072: struct {
[; ;pic18f4520.h: 3073: unsigned TBLPTRU :5;
[; ;pic18f4520.h: 3074: unsigned ACSS :1;
[; ;pic18f4520.h: 3075: };
[; ;pic18f4520.h: 3076: } TBLPTRUbits @ 0xFF8;
[; ;pic18f4520.h: 3079: extern volatile unsigned short long PCLAT @ 0xFF9;
"3081
[; ;pic18f4520.h: 3081: asm("PCLAT equ 0FF9h");
[; <" PCLAT equ 0FF9h ;# ">
[; ;pic18f4520.h: 3084: extern volatile unsigned short long PC @ 0xFF9;
"3086
[; ;pic18f4520.h: 3086: asm("PC equ 0FF9h");
[; <" PC equ 0FF9h ;# ">
[; ;pic18f4520.h: 3089: extern volatile union {
[; ;pic18f4520.h: 3090: struct {
[; ;pic18f4520.h: 3091: unsigned PCLAT :21;
[; ;pic18f4520.h: 3092: };
[; ;pic18f4520.h: 3093: } PCLATbits @ 0xFF9;
[; ;pic18f4520.h: 3095: extern volatile union {
[; ;pic18f4520.h: 3096: struct {
[; ;pic18f4520.h: 3097: unsigned PCLAT :21;
[; ;pic18f4520.h: 3098: };
[; ;pic18f4520.h: 3099: } PCbits @ 0xFF9;
[; ;pic18f4520.h: 3102: extern volatile unsigned char PCL @ 0xFF9;
"3104
[; ;pic18f4520.h: 3104: asm("PCL equ 0FF9h");
[; <" PCL equ 0FF9h ;# ">
[; ;pic18f4520.h: 3107: extern volatile union {
[; ;pic18f4520.h: 3108: struct {
[; ;pic18f4520.h: 3109: unsigned PCL :8;
[; ;pic18f4520.h: 3110: };
[; ;pic18f4520.h: 3111: } PCLbits @ 0xFF9;
[; ;pic18f4520.h: 3114: extern volatile unsigned char PCLATH @ 0xFFA;
"3116
[; ;pic18f4520.h: 3116: asm("PCLATH equ 0FFAh");
[; <" PCLATH equ 0FFAh ;# ">
[; ;pic18f4520.h: 3119: extern volatile union {
[; ;pic18f4520.h: 3120: struct {
[; ;pic18f4520.h: 3121: unsigned PCH :8;
[; ;pic18f4520.h: 3122: };
[; ;pic18f4520.h: 3123: } PCLATHbits @ 0xFFA;
[; ;pic18f4520.h: 3126: extern volatile unsigned char PCLATU @ 0xFFB;
"3128
[; ;pic18f4520.h: 3128: asm("PCLATU equ 0FFBh");
[; <" PCLATU equ 0FFBh ;# ">
[; ;pic18f4520.h: 3131: extern volatile union {
[; ;pic18f4520.h: 3132: struct {
[; ;pic18f4520.h: 3133: unsigned PCU :5;
[; ;pic18f4520.h: 3134: };
[; ;pic18f4520.h: 3135: } PCLATUbits @ 0xFFB;
[; ;pic18f4520.h: 3138: extern volatile unsigned char STKPTR @ 0xFFC;
"3140
[; ;pic18f4520.h: 3140: asm("STKPTR equ 0FFCh");
[; <" STKPTR equ 0FFCh ;# ">
[; ;pic18f4520.h: 3143: extern volatile union {
[; ;pic18f4520.h: 3144: struct {
[; ;pic18f4520.h: 3145: unsigned STKPTR :5;
[; ;pic18f4520.h: 3146: unsigned :1;
[; ;pic18f4520.h: 3147: unsigned STKUNF :1;
[; ;pic18f4520.h: 3148: unsigned STKFUL :1;
[; ;pic18f4520.h: 3149: };
[; ;pic18f4520.h: 3150: struct {
[; ;pic18f4520.h: 3151: unsigned SP0 :1;
[; ;pic18f4520.h: 3152: unsigned SP1 :1;
[; ;pic18f4520.h: 3153: unsigned SP2 :1;
[; ;pic18f4520.h: 3154: unsigned SP3 :1;
[; ;pic18f4520.h: 3155: unsigned SP4 :1;
[; ;pic18f4520.h: 3156: unsigned :2;
[; ;pic18f4520.h: 3157: unsigned STKOVF :1;
[; ;pic18f4520.h: 3158: };
[; ;pic18f4520.h: 3159: } STKPTRbits @ 0xFFC;
[; ;pic18f4520.h: 3162: extern volatile unsigned short long TOS @ 0xFFD;
"3164
[; ;pic18f4520.h: 3164: asm("TOS equ 0FFDh");
[; <" TOS equ 0FFDh ;# ">
[; ;pic18f4520.h: 3167: extern volatile union {
[; ;pic18f4520.h: 3168: struct {
[; ;pic18f4520.h: 3169: unsigned TOS :21;
[; ;pic18f4520.h: 3170: };
[; ;pic18f4520.h: 3171: } TOSbits @ 0xFFD;
[; ;pic18f4520.h: 3174: extern volatile unsigned char TOSL @ 0xFFD;
"3176
[; ;pic18f4520.h: 3176: asm("TOSL equ 0FFDh");
[; <" TOSL equ 0FFDh ;# ">
[; ;pic18f4520.h: 3179: extern volatile union {
[; ;pic18f4520.h: 3180: struct {
[; ;pic18f4520.h: 3181: unsigned TOSL :8;
[; ;pic18f4520.h: 3182: };
[; ;pic18f4520.h: 3183: } TOSLbits @ 0xFFD;
[; ;pic18f4520.h: 3186: extern volatile unsigned char TOSH @ 0xFFE;
"3188
[; ;pic18f4520.h: 3188: asm("TOSH equ 0FFEh");
[; <" TOSH equ 0FFEh ;# ">
[; ;pic18f4520.h: 3191: extern volatile union {
[; ;pic18f4520.h: 3192: struct {
[; ;pic18f4520.h: 3193: unsigned TOSH :8;
[; ;pic18f4520.h: 3194: };
[; ;pic18f4520.h: 3195: } TOSHbits @ 0xFFE;
[; ;pic18f4520.h: 3198: extern volatile unsigned char TOSU @ 0xFFF;
"3200
[; ;pic18f4520.h: 3200: asm("TOSU equ 0FFFh");
[; <" TOSU equ 0FFFh ;# ">
[; ;pic18f4520.h: 3203: extern volatile union {
[; ;pic18f4520.h: 3204: struct {
[; ;pic18f4520.h: 3205: unsigned TOSU :5;
[; ;pic18f4520.h: 3206: };
[; ;pic18f4520.h: 3207: } TOSUbits @ 0xFFF;
[; ;pic18f4520.h: 3213: extern volatile bit ABDEN @ (((unsigned) &BAUDCON)*8) + 0;
[; ;pic18f4520.h: 3215: extern volatile bit ABDOVF @ (((unsigned) &BAUDCON)*8) + 7;
[; ;pic18f4520.h: 3217: extern volatile bit ACKDT @ (((unsigned) &SSPCON2)*8) + 5;
[; ;pic18f4520.h: 3219: extern volatile bit ACKEN @ (((unsigned) &SSPCON2)*8) + 4;
[; ;pic18f4520.h: 3221: extern volatile bit ACKSTAT @ (((unsigned) &SSPCON2)*8) + 6;
[; ;pic18f4520.h: 3223: extern volatile bit ACQT0 @ (((unsigned) &ADCON2)*8) + 3;
[; ;pic18f4520.h: 3225: extern volatile bit ACQT1 @ (((unsigned) &ADCON2)*8) + 4;
[; ;pic18f4520.h: 3227: extern volatile bit ACQT2 @ (((unsigned) &ADCON2)*8) + 5;
[; ;pic18f4520.h: 3229: extern volatile bit ADCS0 @ (((unsigned) &ADCON2)*8) + 0;
[; ;pic18f4520.h: 3231: extern volatile bit ADCS1 @ (((unsigned) &ADCON2)*8) + 1;
[; ;pic18f4520.h: 3233: extern volatile bit ADCS2 @ (((unsigned) &ADCON2)*8) + 2;
[; ;pic18f4520.h: 3235: extern volatile bit ADDEN @ (((unsigned) &RCSTA)*8) + 3;
[; ;pic18f4520.h: 3237: extern volatile bit ADEN @ (((unsigned) &RCSTA)*8) + 3;
[; ;pic18f4520.h: 3239: extern volatile bit ADFM @ (((unsigned) &ADCON2)*8) + 7;
[; ;pic18f4520.h: 3241: extern volatile bit ADIE @ (((unsigned) &PIE1)*8) + 6;
[; ;pic18f4520.h: 3243: extern volatile bit ADIF @ (((unsigned) &PIR1)*8) + 6;
[; ;pic18f4520.h: 3245: extern volatile bit ADIP @ (((unsigned) &IPR1)*8) + 6;
[; ;pic18f4520.h: 3247: extern volatile bit ADMSK1 @ (((unsigned) &SSPCON2)*8) + 1;
[; ;pic18f4520.h: 3249: extern volatile bit ADMSK2 @ (((unsigned) &SSPCON2)*8) + 2;
[; ;pic18f4520.h: 3251: extern volatile bit ADMSK3 @ (((unsigned) &SSPCON2)*8) + 3;
[; ;pic18f4520.h: 3253: extern volatile bit ADMSK4 @ (((unsigned) &SSPCON2)*8) + 4;
[; ;pic18f4520.h: 3255: extern volatile bit ADMSK5 @ (((unsigned) &SSPCON2)*8) + 5;
[; ;pic18f4520.h: 3257: extern volatile bit ADON @ (((unsigned) &ADCON0)*8) + 0;
[; ;pic18f4520.h: 3259: extern volatile bit AN0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f4520.h: 3261: extern volatile bit AN1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f4520.h: 3263: extern volatile bit AN10 @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f4520.h: 3265: extern volatile bit AN11 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f4520.h: 3267: extern volatile bit AN12 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f4520.h: 3269: extern volatile bit AN2 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f4520.h: 3271: extern volatile bit AN3 @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f4520.h: 3273: extern volatile bit AN4 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f4520.h: 3275: extern volatile bit AN5 @ (((unsigned) &PORTE)*8) + 0;
[; ;pic18f4520.h: 3277: extern volatile bit AN6 @ (((unsigned) &PORTE)*8) + 1;
[; ;pic18f4520.h: 3279: extern volatile bit AN7 @ (((unsigned) &PORTE)*8) + 2;
[; ;pic18f4520.h: 3281: extern volatile bit AN8 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f4520.h: 3283: extern volatile bit AN9 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f4520.h: 3285: extern volatile bit BCLIE @ (((unsigned) &PIE2)*8) + 3;
[; ;pic18f4520.h: 3287: extern volatile bit BCLIF @ (((unsigned) &PIR2)*8) + 3;
[; ;pic18f4520.h: 3289: extern volatile bit BCLIP @ (((unsigned) &IPR2)*8) + 3;
[; ;pic18f4520.h: 3291: extern volatile bit BF @ (((unsigned) &SSPSTAT)*8) + 0;
[; ;pic18f4520.h: 3293: extern volatile bit BGST @ (((unsigned) &HLVDCON)*8) + 5;
[; ;pic18f4520.h: 3295: extern volatile bit BOR @ (((unsigned) &RCON)*8) + 0;
[; ;pic18f4520.h: 3297: extern volatile bit BRG16 @ (((unsigned) &BAUDCON)*8) + 3;
[; ;pic18f4520.h: 3299: extern volatile bit BRGH @ (((unsigned) &TXSTA)*8) + 2;
[; ;pic18f4520.h: 3301: extern volatile bit BRGH1 @ (((unsigned) &TXSTA)*8) + 2;
[; ;pic18f4520.h: 3303: extern volatile bit C1INV @ (((unsigned) &CMCON)*8) + 4;
[; ;pic18f4520.h: 3305: extern volatile bit __attribute__((__deprecated__)) C1OUT @ (((unsigned) &CMCON)*8) + 6;
[; ;pic18f4520.h: 3307: extern volatile bit C2INV @ (((unsigned) &CMCON)*8) + 5;
[; ;pic18f4520.h: 3309: extern volatile bit __attribute__((__deprecated__)) C2OUT @ (((unsigned) &CMCON)*8) + 7;
[; ;pic18f4520.h: 3311: extern volatile bit CARRY @ (((unsigned) &STATUS)*8) + 0;
[; ;pic18f4520.h: 3313: extern volatile bit CCP1 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f4520.h: 3315: extern volatile bit CCP10 @ (((unsigned) &PORTE)*8) + 2;
[; ;pic18f4520.h: 3317: extern volatile bit CCP1IE @ (((unsigned) &PIE1)*8) + 2;
[; ;pic18f4520.h: 3319: extern volatile bit CCP1IF @ (((unsigned) &PIR1)*8) + 2;
[; ;pic18f4520.h: 3321: extern volatile bit CCP1IP @ (((unsigned) &IPR1)*8) + 2;
[; ;pic18f4520.h: 3323: extern volatile bit CCP1M0 @ (((unsigned) &CCP1CON)*8) + 0;
[; ;pic18f4520.h: 3325: extern volatile bit CCP1M1 @ (((unsigned) &CCP1CON)*8) + 1;
[; ;pic18f4520.h: 3327: extern volatile bit CCP1M2 @ (((unsigned) &CCP1CON)*8) + 2;
[; ;pic18f4520.h: 3329: extern volatile bit CCP1M3 @ (((unsigned) &CCP1CON)*8) + 3;
[; ;pic18f4520.h: 3331: extern volatile bit CCP1X @ (((unsigned) &CCP1CON)*8) + 5;
[; ;pic18f4520.h: 3333: extern volatile bit CCP1Y @ (((unsigned) &CCP1CON)*8) + 4;
[; ;pic18f4520.h: 3335: extern volatile bit CCP2E @ (((unsigned) &PORTE)*8) + 7;
[; ;pic18f4520.h: 3337: extern volatile bit CCP2IE @ (((unsigned) &PIE2)*8) + 0;
[; ;pic18f4520.h: 3339: extern volatile bit CCP2IF @ (((unsigned) &PIR2)*8) + 0;
[; ;pic18f4520.h: 3341: extern volatile bit CCP2IP @ (((unsigned) &IPR2)*8) + 0;
[; ;pic18f4520.h: 3343: extern volatile bit CCP2M0 @ (((unsigned) &CCP2CON)*8) + 0;
[; ;pic18f4520.h: 3345: extern volatile bit CCP2M1 @ (((unsigned) &CCP2CON)*8) + 1;
[; ;pic18f4520.h: 3347: extern volatile bit CCP2M2 @ (((unsigned) &CCP2CON)*8) + 2;
[; ;pic18f4520.h: 3349: extern volatile bit CCP2M3 @ (((unsigned) &CCP2CON)*8) + 3;
[; ;pic18f4520.h: 3351: extern volatile bit CCP2X @ (((unsigned) &CCP2CON)*8) + 5;
[; ;pic18f4520.h: 3353: extern volatile bit CCP2Y @ (((unsigned) &CCP2CON)*8) + 4;
[; ;pic18f4520.h: 3355: extern volatile bit CCP2_PA2 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f4520.h: 3357: extern volatile bit CCP6E @ (((unsigned) &PORTE)*8) + 6;
[; ;pic18f4520.h: 3359: extern volatile bit CCP7E @ (((unsigned) &PORTE)*8) + 5;
[; ;pic18f4520.h: 3361: extern volatile bit CCP8E @ (((unsigned) &PORTE)*8) + 4;
[; ;pic18f4520.h: 3363: extern volatile bit CCP9E @ (((unsigned) &PORTE)*8) + 3;
[; ;pic18f4520.h: 3365: extern volatile bit CFGS @ (((unsigned) &EECON1)*8) + 6;
[; ;pic18f4520.h: 3367: extern volatile bit CHS0 @ (((unsigned) &ADCON0)*8) + 2;
[; ;pic18f4520.h: 3369: extern volatile bit CHS1 @ (((unsigned) &ADCON0)*8) + 3;
[; ;pic18f4520.h: 3371: extern volatile bit CHS2 @ (((unsigned) &ADCON0)*8) + 4;
[; ;pic18f4520.h: 3373: extern volatile bit CHS3 @ (((unsigned) &ADCON0)*8) + 5;
[; ;pic18f4520.h: 3375: extern volatile bit CHSN3 @ (((unsigned) &ADCON1)*8) + 3;
[; ;pic18f4520.h: 3377: extern volatile bit CIS @ (((unsigned) &CMCON)*8) + 3;
[; ;pic18f4520.h: 3379: extern volatile bit CK @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f4520.h: 3381: extern volatile bit CKE @ (((unsigned) &SSPSTAT)*8) + 6;
[; ;pic18f4520.h: 3383: extern volatile bit CKP @ (((unsigned) &SSPCON1)*8) + 4;
[; ;pic18f4520.h: 3385: extern volatile bit CLKI @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f4520.h: 3387: extern volatile bit CLKO @ (((unsigned) &PORTA)*8) + 6;
[; ;pic18f4520.h: 3389: extern volatile bit CM0 @ (((unsigned) &CMCON)*8) + 0;
[; ;pic18f4520.h: 3391: extern volatile bit CM1 @ (((unsigned) &CMCON)*8) + 1;
[; ;pic18f4520.h: 3393: extern volatile bit CM2 @ (((unsigned) &CMCON)*8) + 2;
[; ;pic18f4520.h: 3395: extern volatile bit CMEN0 @ (((unsigned) &CMCON)*8) + 0;
[; ;pic18f4520.h: 3397: extern volatile bit CMEN1 @ (((unsigned) &CMCON)*8) + 1;
[; ;pic18f4520.h: 3399: extern volatile bit CMEN2 @ (((unsigned) &CMCON)*8) + 2;
[; ;pic18f4520.h: 3401: extern volatile bit CMIE @ (((unsigned) &PIE2)*8) + 6;
[; ;pic18f4520.h: 3403: extern volatile bit CMIF @ (((unsigned) &PIR2)*8) + 6;
[; ;pic18f4520.h: 3405: extern volatile bit CMIP @ (((unsigned) &IPR2)*8) + 6;
[; ;pic18f4520.h: 3407: extern volatile bit CREN @ (((unsigned) &RCSTA)*8) + 4;
[; ;pic18f4520.h: 3409: extern volatile bit CS @ (((unsigned) &PORTE)*8) + 2;
[; ;pic18f4520.h: 3411: extern volatile bit CSRC @ (((unsigned) &TXSTA)*8) + 7;
[; ;pic18f4520.h: 3413: extern volatile bit CSRC1 @ (((unsigned) &TXSTA)*8) + 7;
[; ;pic18f4520.h: 3415: extern volatile bit CVR0 @ (((unsigned) &CVRCON)*8) + 0;
[; ;pic18f4520.h: 3417: extern volatile bit CVR1 @ (((unsigned) &CVRCON)*8) + 1;
[; ;pic18f4520.h: 3419: extern volatile bit CVR2 @ (((unsigned) &CVRCON)*8) + 2;
[; ;pic18f4520.h: 3421: extern volatile bit CVR3 @ (((unsigned) &CVRCON)*8) + 3;
[; ;pic18f4520.h: 3423: extern volatile bit CVREF @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f4520.h: 3425: extern volatile bit CVREN @ (((unsigned) &CVRCON)*8) + 7;
[; ;pic18f4520.h: 3427: extern volatile bit CVROE @ (((unsigned) &CVRCON)*8) + 6;
[; ;pic18f4520.h: 3429: extern volatile bit CVROEN @ (((unsigned) &CVRCON)*8) + 6;
[; ;pic18f4520.h: 3431: extern volatile bit CVRR @ (((unsigned) &CVRCON)*8) + 5;
[; ;pic18f4520.h: 3433: extern volatile bit CVRSS @ (((unsigned) &CVRCON)*8) + 4;
[; ;pic18f4520.h: 3435: extern volatile bit DA @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f4520.h: 3437: extern volatile bit DC @ (((unsigned) &STATUS)*8) + 1;
[; ;pic18f4520.h: 3439: extern volatile bit DC1B0 @ (((unsigned) &CCP1CON)*8) + 4;
[; ;pic18f4520.h: 3441: extern volatile bit DC1B1 @ (((unsigned) &CCP1CON)*8) + 5;
[; ;pic18f4520.h: 3443: extern volatile bit DC2B0 @ (((unsigned) &CCP2CON)*8) + 4;
[; ;pic18f4520.h: 3445: extern volatile bit DC2B1 @ (((unsigned) &CCP2CON)*8) + 5;
[; ;pic18f4520.h: 3447: extern volatile bit DONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f4520.h: 3449: extern volatile bit DT @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f4520.h: 3451: extern volatile bit D_A @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f4520.h: 3453: extern volatile bit D_NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f4520.h: 3455: extern volatile bit D_nA @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f4520.h: 3457: extern volatile bit ECCPAS0 @ (((unsigned) &ECCP1AS)*8) + 4;
[; ;pic18f4520.h: 3459: extern volatile bit ECCPAS1 @ (((unsigned) &ECCP1AS)*8) + 5;
[; ;pic18f4520.h: 3461: extern volatile bit ECCPAS2 @ (((unsigned) &ECCP1AS)*8) + 6;
[; ;pic18f4520.h: 3463: extern volatile bit ECCPASE @ (((unsigned) &ECCP1AS)*8) + 7;
[; ;pic18f4520.h: 3465: extern volatile bit EEFS @ (((unsigned) &EECON1)*8) + 6;
[; ;pic18f4520.h: 3467: extern volatile bit EEIE @ (((unsigned) &PIE2)*8) + 4;
[; ;pic18f4520.h: 3469: extern volatile bit EEIF @ (((unsigned) &PIR2)*8) + 4;
[; ;pic18f4520.h: 3471: extern volatile bit EEIP @ (((unsigned) &IPR2)*8) + 4;
[; ;pic18f4520.h: 3473: extern volatile bit EEPGD @ (((unsigned) &EECON1)*8) + 7;
[; ;pic18f4520.h: 3475: extern volatile bit FERR @ (((unsigned) &RCSTA)*8) + 2;
[; ;pic18f4520.h: 3477: extern volatile bit FLT0 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f4520.h: 3479: extern volatile bit FLTS @ (((unsigned) &OSCCON)*8) + 2;
[; ;pic18f4520.h: 3481: extern volatile bit FREE @ (((unsigned) &EECON1)*8) + 4;
[; ;pic18f4520.h: 3483: extern volatile bit GCEN @ (((unsigned) &SSPCON2)*8) + 7;
[; ;pic18f4520.h: 3485: extern volatile bit GIE @ (((unsigned) &INTCON)*8) + 7;
[; ;pic18f4520.h: 3487: extern volatile bit GIEH @ (((unsigned) &INTCON)*8) + 7;
[; ;pic18f4520.h: 3489: extern volatile bit GIEL @ (((unsigned) &INTCON)*8) + 6;
[; ;pic18f4520.h: 3491: extern volatile bit GIE_GIEH @ (((unsigned) &INTCON)*8) + 7;
[; ;pic18f4520.h: 3493: extern volatile bit GO @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f4520.h: 3495: extern volatile bit GODONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f4520.h: 3497: extern volatile bit GO_DONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f4520.h: 3499: extern volatile bit GO_NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f4520.h: 3501: extern volatile bit GO_nDONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f4520.h: 3503: extern volatile bit HLVDEN @ (((unsigned) &HLVDCON)*8) + 4;
[; ;pic18f4520.h: 3505: extern volatile bit HLVDIE @ (((unsigned) &PIE2)*8) + 2;
[; ;pic18f4520.h: 3507: extern volatile bit HLVDIF @ (((unsigned) &PIR2)*8) + 2;
[; ;pic18f4520.h: 3509: extern volatile bit HLVDIN @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f4520.h: 3511: extern volatile bit HLVDIP @ (((unsigned) &IPR2)*8) + 2;
[; ;pic18f4520.h: 3513: extern volatile bit HLVDL0 @ (((unsigned) &HLVDCON)*8) + 0;
[; ;pic18f4520.h: 3515: extern volatile bit HLVDL1 @ (((unsigned) &HLVDCON)*8) + 1;
[; ;pic18f4520.h: 3517: extern volatile bit HLVDL2 @ (((unsigned) &HLVDCON)*8) + 2;
[; ;pic18f4520.h: 3519: extern volatile bit HLVDL3 @ (((unsigned) &HLVDCON)*8) + 3;
[; ;pic18f4520.h: 3521: extern volatile bit IBF @ (((unsigned) &TRISE)*8) + 7;
[; ;pic18f4520.h: 3523: extern volatile bit IBOV @ (((unsigned) &TRISE)*8) + 5;
[; ;pic18f4520.h: 3525: extern volatile bit IDLEN @ (((unsigned) &OSCCON)*8) + 7;
[; ;pic18f4520.h: 3527: extern volatile bit INT0 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f4520.h: 3529: extern volatile bit INT0E @ (((unsigned) &INTCON)*8) + 4;
[; ;pic18f4520.h: 3531: extern volatile bit INT0F @ (((unsigned) &INTCON)*8) + 1;
[; ;pic18f4520.h: 3533: extern volatile bit INT0IE @ (((unsigned) &INTCON)*8) + 4;
[; ;pic18f4520.h: 3535: extern volatile bit INT0IF @ (((unsigned) &INTCON)*8) + 1;
[; ;pic18f4520.h: 3537: extern volatile bit INT1 @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f4520.h: 3539: extern volatile bit INT1E @ (((unsigned) &INTCON3)*8) + 3;
[; ;pic18f4520.h: 3541: extern volatile bit INT1F @ (((unsigned) &INTCON3)*8) + 0;
[; ;pic18f4520.h: 3543: extern volatile bit INT1IE @ (((unsigned) &INTCON3)*8) + 3;
[; ;pic18f4520.h: 3545: extern volatile bit INT1IF @ (((unsigned) &INTCON3)*8) + 0;
[; ;pic18f4520.h: 3547: extern volatile bit INT1IP @ (((unsigned) &INTCON3)*8) + 6;
[; ;pic18f4520.h: 3549: extern volatile bit INT1P @ (((unsigned) &INTCON3)*8) + 6;
[; ;pic18f4520.h: 3551: extern volatile bit INT2 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f4520.h: 3553: extern volatile bit INT2E @ (((unsigned) &INTCON3)*8) + 4;
[; ;pic18f4520.h: 3555: extern volatile bit INT2F @ (((unsigned) &INTCON3)*8) + 1;
[; ;pic18f4520.h: 3557: extern volatile bit INT2IE @ (((unsigned) &INTCON3)*8) + 4;
[; ;pic18f4520.h: 3559: extern volatile bit INT2IF @ (((unsigned) &INTCON3)*8) + 1;
[; ;pic18f4520.h: 3561: extern volatile bit INT2IP @ (((unsigned) &INTCON3)*8) + 7;
[; ;pic18f4520.h: 3563: extern volatile bit INT2P @ (((unsigned) &INTCON3)*8) + 7;
[; ;pic18f4520.h: 3565: extern volatile bit INTEDG0 @ (((unsigned) &INTCON2)*8) + 6;
[; ;pic18f4520.h: 3567: extern volatile bit INTEDG1 @ (((unsigned) &INTCON2)*8) + 5;
[; ;pic18f4520.h: 3569: extern volatile bit INTEDG2 @ (((unsigned) &INTCON2)*8) + 4;
[; ;pic18f4520.h: 3571: extern volatile bit INTSRC @ (((unsigned) &OSCTUNE)*8) + 7;
[; ;pic18f4520.h: 3573: extern volatile bit IOFS @ (((unsigned) &OSCCON)*8) + 2;
[; ;pic18f4520.h: 3575: extern volatile bit IPEN @ (((unsigned) &RCON)*8) + 7;
[; ;pic18f4520.h: 3577: extern volatile bit IRCF0 @ (((unsigned) &OSCCON)*8) + 4;
[; ;pic18f4520.h: 3579: extern volatile bit IRCF1 @ (((unsigned) &OSCCON)*8) + 5;
[; ;pic18f4520.h: 3581: extern volatile bit IRCF2 @ (((unsigned) &OSCCON)*8) + 6;
[; ;pic18f4520.h: 3583: extern volatile bit IRVST @ (((unsigned) &HLVDCON)*8) + 5;
[; ;pic18f4520.h: 3585: extern volatile bit IVRST @ (((unsigned) &HLVDCON)*8) + 5;
[; ;pic18f4520.h: 3587: extern volatile bit KBI0 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f4520.h: 3589: extern volatile bit KBI1 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f4520.h: 3591: extern volatile bit KBI2 @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f4520.h: 3593: extern volatile bit KBI3 @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f4520.h: 3595: extern volatile bit LA0 @ (((unsigned) &LATA)*8) + 0;
[; ;pic18f4520.h: 3597: extern volatile bit LA1 @ (((unsigned) &LATA)*8) + 1;
[; ;pic18f4520.h: 3599: extern volatile bit LA2 @ (((unsigned) &LATA)*8) + 2;
[; ;pic18f4520.h: 3601: extern volatile bit LA3 @ (((unsigned) &LATA)*8) + 3;
[; ;pic18f4520.h: 3603: extern volatile bit LA4 @ (((unsigned) &LATA)*8) + 4;
[; ;pic18f4520.h: 3605: extern volatile bit LA5 @ (((unsigned) &LATA)*8) + 5;
[; ;pic18f4520.h: 3607: extern volatile bit LA6 @ (((unsigned) &LATA)*8) + 6;
[; ;pic18f4520.h: 3609: extern volatile bit LA7 @ (((unsigned) &LATA)*8) + 7;
[; ;pic18f4520.h: 3611: extern volatile bit LATA0 @ (((unsigned) &LATA)*8) + 0;
[; ;pic18f4520.h: 3613: extern volatile bit LATA1 @ (((unsigned) &LATA)*8) + 1;
[; ;pic18f4520.h: 3615: extern volatile bit LATA2 @ (((unsigned) &LATA)*8) + 2;
[; ;pic18f4520.h: 3617: extern volatile bit LATA3 @ (((unsigned) &LATA)*8) + 3;
[; ;pic18f4520.h: 3619: extern volatile bit LATA4 @ (((unsigned) &LATA)*8) + 4;
[; ;pic18f4520.h: 3621: extern volatile bit LATA5 @ (((unsigned) &LATA)*8) + 5;
[; ;pic18f4520.h: 3623: extern volatile bit LATA6 @ (((unsigned) &LATA)*8) + 6;
[; ;pic18f4520.h: 3625: extern volatile bit LATA7 @ (((unsigned) &LATA)*8) + 7;
[; ;pic18f4520.h: 3627: extern volatile bit LATB0 @ (((unsigned) &LATB)*8) + 0;
[; ;pic18f4520.h: 3629: extern volatile bit LATB1 @ (((unsigned) &LATB)*8) + 1;
[; ;pic18f4520.h: 3631: extern volatile bit LATB2 @ (((unsigned) &LATB)*8) + 2;
[; ;pic18f4520.h: 3633: extern volatile bit LATB3 @ (((unsigned) &LATB)*8) + 3;
[; ;pic18f4520.h: 3635: extern volatile bit LATB4 @ (((unsigned) &LATB)*8) + 4;
[; ;pic18f4520.h: 3637: extern volatile bit LATB5 @ (((unsigned) &LATB)*8) + 5;
[; ;pic18f4520.h: 3639: extern volatile bit LATB6 @ (((unsigned) &LATB)*8) + 6;
[; ;pic18f4520.h: 3641: extern volatile bit LATB7 @ (((unsigned) &LATB)*8) + 7;
[; ;pic18f4520.h: 3643: extern volatile bit LATC0 @ (((unsigned) &LATC)*8) + 0;
[; ;pic18f4520.h: 3645: extern volatile bit LATC1 @ (((unsigned) &LATC)*8) + 1;
[; ;pic18f4520.h: 3647: extern volatile bit LATC2 @ (((unsigned) &LATC)*8) + 2;
[; ;pic18f4520.h: 3649: extern volatile bit LATC3 @ (((unsigned) &LATC)*8) + 3;
[; ;pic18f4520.h: 3651: extern volatile bit LATC4 @ (((unsigned) &LATC)*8) + 4;
[; ;pic18f4520.h: 3653: extern volatile bit LATC5 @ (((unsigned) &LATC)*8) + 5;
[; ;pic18f4520.h: 3655: extern volatile bit LATC6 @ (((unsigned) &LATC)*8) + 6;
[; ;pic18f4520.h: 3657: extern volatile bit LATC7 @ (((unsigned) &LATC)*8) + 7;
[; ;pic18f4520.h: 3659: extern volatile bit LATD0 @ (((unsigned) &LATD)*8) + 0;
[; ;pic18f4520.h: 3661: extern volatile bit LATD1 @ (((unsigned) &LATD)*8) + 1;
[; ;pic18f4520.h: 3663: extern volatile bit LATD2 @ (((unsigned) &LATD)*8) + 2;
[; ;pic18f4520.h: 3665: extern volatile bit LATD3 @ (((unsigned) &LATD)*8) + 3;
[; ;pic18f4520.h: 3667: extern volatile bit LATD4 @ (((unsigned) &LATD)*8) + 4;
[; ;pic18f4520.h: 3669: extern volatile bit LATD5 @ (((unsigned) &LATD)*8) + 5;
[; ;pic18f4520.h: 3671: extern volatile bit LATD6 @ (((unsigned) &LATD)*8) + 6;
[; ;pic18f4520.h: 3673: extern volatile bit LATD7 @ (((unsigned) &LATD)*8) + 7;
[; ;pic18f4520.h: 3675: extern volatile bit LATE0 @ (((unsigned) &LATE)*8) + 0;
[; ;pic18f4520.h: 3677: extern volatile bit LATE1 @ (((unsigned) &LATE)*8) + 1;
[; ;pic18f4520.h: 3679: extern volatile bit LATE2 @ (((unsigned) &LATE)*8) + 2;
[; ;pic18f4520.h: 3681: extern volatile bit LB0 @ (((unsigned) &LATB)*8) + 0;
[; ;pic18f4520.h: 3683: extern volatile bit LB1 @ (((unsigned) &LATB)*8) + 1;
[; ;pic18f4520.h: 3685: extern volatile bit LB2 @ (((unsigned) &LATB)*8) + 2;
[; ;pic18f4520.h: 3687: extern volatile bit LB3 @ (((unsigned) &LATB)*8) + 3;
[; ;pic18f4520.h: 3689: extern volatile bit LB4 @ (((unsigned) &LATB)*8) + 4;
[; ;pic18f4520.h: 3691: extern volatile bit LB5 @ (((unsigned) &LATB)*8) + 5;
[; ;pic18f4520.h: 3693: extern volatile bit LB6 @ (((unsigned) &LATB)*8) + 6;
[; ;pic18f4520.h: 3695: extern volatile bit LB7 @ (((unsigned) &LATB)*8) + 7;
[; ;pic18f4520.h: 3697: extern volatile bit LC0 @ (((unsigned) &LATC)*8) + 0;
[; ;pic18f4520.h: 3699: extern volatile bit LC1 @ (((unsigned) &LATC)*8) + 1;
[; ;pic18f4520.h: 3701: extern volatile bit LC2 @ (((unsigned) &LATC)*8) + 2;
[; ;pic18f4520.h: 3703: extern volatile bit LC3 @ (((unsigned) &LATC)*8) + 3;
[; ;pic18f4520.h: 3705: extern volatile bit LC4 @ (((unsigned) &LATC)*8) + 4;
[; ;pic18f4520.h: 3707: extern volatile bit LC5 @ (((unsigned) &LATC)*8) + 5;
[; ;pic18f4520.h: 3709: extern volatile bit LC6 @ (((unsigned) &LATC)*8) + 6;
[; ;pic18f4520.h: 3711: extern volatile bit LC7 @ (((unsigned) &LATC)*8) + 7;
[; ;pic18f4520.h: 3713: extern volatile bit LD0 @ (((unsigned) &LATD)*8) + 0;
[; ;pic18f4520.h: 3715: extern volatile bit LD1 @ (((unsigned) &LATD)*8) + 1;
[; ;pic18f4520.h: 3717: extern volatile bit LD2 @ (((unsigned) &LATD)*8) + 2;
[; ;pic18f4520.h: 3719: extern volatile bit LD3 @ (((unsigned) &LATD)*8) + 3;
[; ;pic18f4520.h: 3721: extern volatile bit LD4 @ (((unsigned) &LATD)*8) + 4;
[; ;pic18f4520.h: 3723: extern volatile bit LD5 @ (((unsigned) &LATD)*8) + 5;
[; ;pic18f4520.h: 3725: extern volatile bit LD6 @ (((unsigned) &LATD)*8) + 6;
[; ;pic18f4520.h: 3727: extern volatile bit LD7 @ (((unsigned) &LATD)*8) + 7;
[; ;pic18f4520.h: 3729: extern volatile bit LE0 @ (((unsigned) &LATE)*8) + 0;
[; ;pic18f4520.h: 3731: extern volatile bit LE1 @ (((unsigned) &LATE)*8) + 1;
[; ;pic18f4520.h: 3733: extern volatile bit LE2 @ (((unsigned) &LATE)*8) + 2;
[; ;pic18f4520.h: 3735: extern volatile bit LE3 @ (((unsigned) &LATE)*8) + 3;
[; ;pic18f4520.h: 3737: extern volatile bit LE4 @ (((unsigned) &LATE)*8) + 4;
[; ;pic18f4520.h: 3739: extern volatile bit LE5 @ (((unsigned) &LATE)*8) + 5;
[; ;pic18f4520.h: 3741: extern volatile bit LE6 @ (((unsigned) &LATE)*8) + 6;
[; ;pic18f4520.h: 3743: extern volatile bit LE7 @ (((unsigned) &LATE)*8) + 7;
[; ;pic18f4520.h: 3745: extern volatile bit LVDEN @ (((unsigned) &HLVDCON)*8) + 4;
[; ;pic18f4520.h: 3747: extern volatile bit LVDIE @ (((unsigned) &PIE2)*8) + 2;
[; ;pic18f4520.h: 3749: extern volatile bit LVDIF @ (((unsigned) &PIR2)*8) + 2;
[; ;pic18f4520.h: 3751: extern volatile bit LVDIN @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f4520.h: 3753: extern volatile bit LVDIP @ (((unsigned) &IPR2)*8) + 2;
[; ;pic18f4520.h: 3755: extern volatile bit LVDL0 @ (((unsigned) &HLVDCON)*8) + 0;
[; ;pic18f4520.h: 3757: extern volatile bit LVDL1 @ (((unsigned) &HLVDCON)*8) + 1;
[; ;pic18f4520.h: 3759: extern volatile bit LVDL2 @ (((unsigned) &HLVDCON)*8) + 2;
[; ;pic18f4520.h: 3761: extern volatile bit LVDL3 @ (((unsigned) &HLVDCON)*8) + 3;
[; ;pic18f4520.h: 3763: extern volatile bit LVV0 @ (((unsigned) &HLVDCON)*8) + 0;
[; ;pic18f4520.h: 3765: extern volatile bit LVV1 @ (((unsigned) &HLVDCON)*8) + 1;
[; ;pic18f4520.h: 3767: extern volatile bit LVV2 @ (((unsigned) &HLVDCON)*8) + 2;
[; ;pic18f4520.h: 3769: extern volatile bit LVV3 @ (((unsigned) &HLVDCON)*8) + 3;
[; ;pic18f4520.h: 3771: extern volatile bit MCLR @ (((unsigned) &PORTE)*8) + 3;
[; ;pic18f4520.h: 3773: extern volatile bit NEGATIVE @ (((unsigned) &STATUS)*8) + 4;
[; ;pic18f4520.h: 3775: extern volatile bit NOT_A @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f4520.h: 3777: extern volatile bit NOT_ADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f4520.h: 3779: extern volatile bit NOT_BOR @ (((unsigned) &RCON)*8) + 0;
[; ;pic18f4520.h: 3781: extern volatile bit NOT_CS @ (((unsigned) &PORTE)*8) + 2;
[; ;pic18f4520.h: 3783: extern volatile bit NOT_DONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f4520.h: 3785: extern volatile bit NOT_MCLR @ (((unsigned) &PORTE)*8) + 3;
[; ;pic18f4520.h: 3787: extern volatile bit NOT_PD @ (((unsigned) &RCON)*8) + 2;
[; ;pic18f4520.h: 3789: extern volatile bit NOT_POR @ (((unsigned) &RCON)*8) + 1;
[; ;pic18f4520.h: 3791: extern volatile bit NOT_RBPU @ (((unsigned) &INTCON2)*8) + 7;
[; ;pic18f4520.h: 3793: extern volatile bit NOT_RD @ (((unsigned) &PORTE)*8) + 0;
[; ;pic18f4520.h: 3795: extern volatile bit NOT_RI @ (((unsigned) &RCON)*8) + 4;
[; ;pic18f4520.h: 3797: extern volatile bit NOT_SS @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f4520.h: 3799: extern volatile bit NOT_T1SYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic18f4520.h: 3801: extern volatile bit NOT_T3SYNC @ (((unsigned) &T3CON)*8) + 2;
[; ;pic18f4520.h: 3803: extern volatile bit NOT_TO @ (((unsigned) &RCON)*8) + 3;
[; ;pic18f4520.h: 3805: extern volatile bit NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f4520.h: 3807: extern volatile bit NOT_WR @ (((unsigned) &PORTE)*8) + 1;
[; ;pic18f4520.h: 3809: extern volatile bit NOT_WRITE @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f4520.h: 3811: extern volatile bit OBF @ (((unsigned) &TRISE)*8) + 6;
[; ;pic18f4520.h: 3813: extern volatile bit OERR @ (((unsigned) &RCSTA)*8) + 1;
[; ;pic18f4520.h: 3815: extern volatile bit OSC1 @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f4520.h: 3817: extern volatile bit OSC2 @ (((unsigned) &PORTA)*8) + 6;
[; ;pic18f4520.h: 3819: extern volatile bit OSCFIE @ (((unsigned) &PIE2)*8) + 7;
[; ;pic18f4520.h: 3821: extern volatile bit OSCFIF @ (((unsigned) &PIR2)*8) + 7;
[; ;pic18f4520.h: 3823: extern volatile bit OSCFIP @ (((unsigned) &IPR2)*8) + 7;
[; ;pic18f4520.h: 3825: extern volatile bit OSTS @ (((unsigned) &OSCCON)*8) + 3;
[; ;pic18f4520.h: 3827: extern volatile bit OV @ (((unsigned) &STATUS)*8) + 3;
[; ;pic18f4520.h: 3829: extern volatile bit OVERFLOW @ (((unsigned) &STATUS)*8) + 3;
[; ;pic18f4520.h: 3831: extern volatile bit P1A @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f4520.h: 3833: extern volatile bit P1B @ (((unsigned) &PORTD)*8) + 5;
[; ;pic18f4520.h: 3835: extern volatile bit P1C @ (((unsigned) &PORTD)*8) + 6;
[; ;pic18f4520.h: 3837: extern volatile bit P1D @ (((unsigned) &PORTD)*8) + 7;
[; ;pic18f4520.h: 3839: extern volatile bit P1M0 @ (((unsigned) &CCP1CON)*8) + 6;
[; ;pic18f4520.h: 3841: extern volatile bit P1M1 @ (((unsigned) &CCP1CON)*8) + 7;
[; ;pic18f4520.h: 3843: extern volatile bit PA1 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f4520.h: 3845: extern volatile bit PA2 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f4520.h: 3847: extern volatile bit PA2E @ (((unsigned) &PORTE)*8) + 7;
[; ;pic18f4520.h: 3849: extern volatile bit PB1E @ (((unsigned) &PORTE)*8) + 6;
[; ;pic18f4520.h: 3851: extern volatile bit PB2 @ (((unsigned) &PORTE)*8) + 2;
[; ;pic18f4520.h: 3853: extern volatile bit PB3E @ (((unsigned) &PORTE)*8) + 4;
[; ;pic18f4520.h: 3855: extern volatile bit PC1E @ (((unsigned) &PORTE)*8) + 5;
[; ;pic18f4520.h: 3857: extern volatile bit PC2 @ (((unsigned) &PORTE)*8) + 1;
[; ;pic18f4520.h: 3859: extern volatile bit PC3E @ (((unsigned) &PORTE)*8) + 3;
[; ;pic18f4520.h: 3861: extern volatile bit PCFG0 @ (((unsigned) &ADCON1)*8) + 0;
[; ;pic18f4520.h: 3863: extern volatile bit PCFG1 @ (((unsigned) &ADCON1)*8) + 1;
[; ;pic18f4520.h: 3865: extern volatile bit PCFG2 @ (((unsigned) &ADCON1)*8) + 2;
[; ;pic18f4520.h: 3867: extern volatile bit PCFG3 @ (((unsigned) &ADCON1)*8) + 3;
[; ;pic18f4520.h: 3869: extern volatile bit PD @ (((unsigned) &RCON)*8) + 2;
[; ;pic18f4520.h: 3871: extern volatile bit PD2 @ (((unsigned) &PORTE)*8) + 0;
[; ;pic18f4520.h: 3873: extern volatile bit PDC0 @ (((unsigned) &PWM1CON)*8) + 0;
[; ;pic18f4520.h: 3875: extern volatile bit PDC1 @ (((unsigned) &PWM1CON)*8) + 1;
[; ;pic18f4520.h: 3877: extern volatile bit PDC2 @ (((unsigned) &PWM1CON)*8) + 2;
[; ;pic18f4520.h: 3879: extern volatile bit PDC3 @ (((unsigned) &PWM1CON)*8) + 3;
[; ;pic18f4520.h: 3881: extern volatile bit PDC4 @ (((unsigned) &PWM1CON)*8) + 4;
[; ;pic18f4520.h: 3883: extern volatile bit PDC5 @ (((unsigned) &PWM1CON)*8) + 5;
[; ;pic18f4520.h: 3885: extern volatile bit PDC6 @ (((unsigned) &PWM1CON)*8) + 6;
[; ;pic18f4520.h: 3887: extern volatile bit PEIE @ (((unsigned) &INTCON)*8) + 6;
[; ;pic18f4520.h: 3889: extern volatile bit PEIE_GIEL @ (((unsigned) &INTCON)*8) + 6;
[; ;pic18f4520.h: 3891: extern volatile bit PEN @ (((unsigned) &SSPCON2)*8) + 2;
[; ;pic18f4520.h: 3893: extern volatile bit PGC @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f4520.h: 3895: extern volatile bit PGD @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f4520.h: 3897: extern volatile bit PGM @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f4520.h: 3899: extern volatile bit PLLEN @ (((unsigned) &OSCTUNE)*8) + 6;
[; ;pic18f4520.h: 3901: extern volatile bit POR @ (((unsigned) &RCON)*8) + 1;
[; ;pic18f4520.h: 3903: extern volatile bit PRSEN @ (((unsigned) &PWM1CON)*8) + 7;
[; ;pic18f4520.h: 3905: extern volatile bit PSA @ (((unsigned) &T0CON)*8) + 3;
[; ;pic18f4520.h: 3907: extern volatile bit PSP0 @ (((unsigned) &PORTD)*8) + 0;
[; ;pic18f4520.h: 3909: extern volatile bit PSP1 @ (((unsigned) &PORTD)*8) + 1;
[; ;pic18f4520.h: 3911: extern volatile bit PSP2 @ (((unsigned) &PORTD)*8) + 2;
[; ;pic18f4520.h: 3913: extern volatile bit PSP3 @ (((unsigned) &PORTD)*8) + 3;
[; ;pic18f4520.h: 3915: extern volatile bit PSP4 @ (((unsigned) &PORTD)*8) + 4;
[; ;pic18f4520.h: 3917: extern volatile bit PSP5 @ (((unsigned) &PORTD)*8) + 5;
[; ;pic18f4520.h: 3919: extern volatile bit PSP6 @ (((unsigned) &PORTD)*8) + 6;
[; ;pic18f4520.h: 3921: extern volatile bit PSP7 @ (((unsigned) &PORTD)*8) + 7;
[; ;pic18f4520.h: 3923: extern volatile bit PSPIE @ (((unsigned) &PIE1)*8) + 7;
[; ;pic18f4520.h: 3925: extern volatile bit PSPIF @ (((unsigned) &PIR1)*8) + 7;
[; ;pic18f4520.h: 3927: extern volatile bit PSPIP @ (((unsigned) &IPR1)*8) + 7;
[; ;pic18f4520.h: 3929: extern volatile bit PSPMODE @ (((unsigned) &TRISE)*8) + 4;
[; ;pic18f4520.h: 3931: extern volatile bit PSSAC0 @ (((unsigned) &ECCP1AS)*8) + 2;
[; ;pic18f4520.h: 3933: extern volatile bit PSSAC1 @ (((unsigned) &ECCP1AS)*8) + 3;
[; ;pic18f4520.h: 3935: extern volatile bit PSSBD0 @ (((unsigned) &ECCP1AS)*8) + 0;
[; ;pic18f4520.h: 3937: extern volatile bit PSSBD1 @ (((unsigned) &ECCP1AS)*8) + 1;
[; ;pic18f4520.h: 3939: extern volatile bit __attribute__((__deprecated__)) RA0 @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f4520.h: 3941: extern volatile bit __attribute__((__deprecated__)) RA1 @ (((unsigned) &PORTA)*8) + 1;
[; ;pic18f4520.h: 3943: extern volatile bit __attribute__((__deprecated__)) RA2 @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f4520.h: 3945: extern volatile bit __attribute__((__deprecated__)) RA3 @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f4520.h: 3947: extern volatile bit __attribute__((__deprecated__)) RA4 @ (((unsigned) &PORTA)*8) + 4;
[; ;pic18f4520.h: 3949: extern volatile bit __attribute__((__deprecated__)) RA5 @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f4520.h: 3951: extern volatile bit __attribute__((__deprecated__)) RA6 @ (((unsigned) &PORTA)*8) + 6;
[; ;pic18f4520.h: 3953: extern volatile bit __attribute__((__deprecated__)) RA7 @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f4520.h: 3955: extern volatile bit __attribute__((__deprecated__)) RB0 @ (((unsigned) &PORTB)*8) + 0;
[; ;pic18f4520.h: 3957: extern volatile bit __attribute__((__deprecated__)) RB1 @ (((unsigned) &PORTB)*8) + 1;
[; ;pic18f4520.h: 3959: extern volatile bit __attribute__((__deprecated__)) RB2 @ (((unsigned) &PORTB)*8) + 2;
[; ;pic18f4520.h: 3961: extern volatile bit __attribute__((__deprecated__)) RB3 @ (((unsigned) &PORTB)*8) + 3;
[; ;pic18f4520.h: 3963: extern volatile bit __attribute__((__deprecated__)) RB4 @ (((unsigned) &PORTB)*8) + 4;
[; ;pic18f4520.h: 3965: extern volatile bit __attribute__((__deprecated__)) RB5 @ (((unsigned) &PORTB)*8) + 5;
[; ;pic18f4520.h: 3967: extern volatile bit __attribute__((__deprecated__)) RB6 @ (((unsigned) &PORTB)*8) + 6;
[; ;pic18f4520.h: 3969: extern volatile bit __attribute__((__deprecated__)) RB7 @ (((unsigned) &PORTB)*8) + 7;
[; ;pic18f4520.h: 3971: extern volatile bit RBIE @ (((unsigned) &INTCON)*8) + 3;
[; ;pic18f4520.h: 3973: extern volatile bit RBIF @ (((unsigned) &INTCON)*8) + 0;
[; ;pic18f4520.h: 3975: extern volatile bit RBIP @ (((unsigned) &INTCON2)*8) + 0;
[; ;pic18f4520.h: 3977: extern volatile bit RBPU @ (((unsigned) &INTCON2)*8) + 7;
[; ;pic18f4520.h: 3979: extern volatile bit __attribute__((__deprecated__)) RC0 @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f4520.h: 3981: extern volatile bit __attribute__((__deprecated__)) RC1 @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f4520.h: 3983: extern volatile bit RC1IE @ (((unsigned) &PIE1)*8) + 5;
[; ;pic18f4520.h: 3985: extern volatile bit RC1IF @ (((unsigned) &PIR1)*8) + 5;
[; ;pic18f4520.h: 3987: extern volatile bit RC1IP @ (((unsigned) &IPR1)*8) + 5;
[; ;pic18f4520.h: 3989: extern volatile bit __attribute__((__deprecated__)) RC2 @ (((unsigned) &PORTC)*8) + 2;
[; ;pic18f4520.h: 3991: extern volatile bit __attribute__((__deprecated__)) RC3 @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f4520.h: 3993: extern volatile bit __attribute__((__deprecated__)) RC4 @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f4520.h: 3995: extern volatile bit __attribute__((__deprecated__)) RC5 @ (((unsigned) &PORTC)*8) + 5;
[; ;pic18f4520.h: 3997: extern volatile bit __attribute__((__deprecated__)) RC6 @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f4520.h: 3999: extern volatile bit __attribute__((__deprecated__)) RC7 @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f4520.h: 4001: extern volatile bit RCEN @ (((unsigned) &SSPCON2)*8) + 3;
[; ;pic18f4520.h: 4003: extern volatile bit RCIDL @ (((unsigned) &BAUDCON)*8) + 6;
[; ;pic18f4520.h: 4005: extern volatile bit RCIE @ (((unsigned) &PIE1)*8) + 5;
[; ;pic18f4520.h: 4007: extern volatile bit RCIF @ (((unsigned) &PIR1)*8) + 5;
[; ;pic18f4520.h: 4009: extern volatile bit RCIP @ (((unsigned) &IPR1)*8) + 5;
[; ;pic18f4520.h: 4011: extern volatile bit RCMT @ (((unsigned) &BAUDCON)*8) + 6;
[; ;pic18f4520.h: 4013: extern volatile bit __attribute__((__deprecated__)) RD @ (((unsigned) &EECON1)*8) + 0;
[; ;pic18f4520.h: 4015: extern volatile bit __attribute__((__deprecated__)) RD0 @ (((unsigned) &PORTD)*8) + 0;
[; ;pic18f4520.h: 4017: extern volatile bit __attribute__((__deprecated__)) RD1 @ (((unsigned) &PORTD)*8) + 1;
[; ;pic18f4520.h: 4019: extern volatile bit RD163 @ (((unsigned) &T3CON)*8) + 7;
[; ;pic18f4520.h: 4021: extern volatile bit __attribute__((__deprecated__)) RD2 @ (((unsigned) &PORTD)*8) + 2;
[; ;pic18f4520.h: 4023: extern volatile bit __attribute__((__deprecated__)) RD3 @ (((unsigned) &PORTD)*8) + 3;
[; ;pic18f4520.h: 4025: extern volatile bit __attribute__((__deprecated__)) RD4 @ (((unsigned) &PORTD)*8) + 4;
[; ;pic18f4520.h: 4027: extern volatile bit __attribute__((__deprecated__)) RD5 @ (((unsigned) &PORTD)*8) + 5;
[; ;pic18f4520.h: 4029: extern volatile bit __attribute__((__deprecated__)) RD6 @ (((unsigned) &PORTD)*8) + 6;
[; ;pic18f4520.h: 4031: extern volatile bit __attribute__((__deprecated__)) RD7 @ (((unsigned) &PORTD)*8) + 7;
[; ;pic18f4520.h: 4033: extern volatile bit RDE @ (((unsigned) &PORTE)*8) + 0;
[; ;pic18f4520.h: 4035: extern volatile bit __attribute__((__deprecated__)) RE0 @ (((unsigned) &PORTE)*8) + 0;
[; ;pic18f4520.h: 4037: extern volatile bit __attribute__((__deprecated__)) RE1 @ (((unsigned) &PORTE)*8) + 1;
[; ;pic18f4520.h: 4039: extern volatile bit __attribute__((__deprecated__)) RE2 @ (((unsigned) &PORTE)*8) + 2;
[; ;pic18f4520.h: 4041: extern volatile bit __attribute__((__deprecated__)) RE3 @ (((unsigned) &PORTE)*8) + 3;
[; ;pic18f4520.h: 4043: extern volatile bit RE4 @ (((unsigned) &PORTE)*8) + 4;
[; ;pic18f4520.h: 4045: extern volatile bit RE5 @ (((unsigned) &PORTE)*8) + 5;
[; ;pic18f4520.h: 4047: extern volatile bit RE6 @ (((unsigned) &PORTE)*8) + 6;
[; ;pic18f4520.h: 4049: extern volatile bit RE7 @ (((unsigned) &PORTE)*8) + 7;
[; ;pic18f4520.h: 4051: extern volatile bit RI @ (((unsigned) &RCON)*8) + 4;
[; ;pic18f4520.h: 4053: extern volatile bit RJPU @ (((unsigned) &PORTA)*8) + 7;
[; ;pic18f4520.h: 4055: extern volatile bit RSEN @ (((unsigned) &SSPCON2)*8) + 1;
[; ;pic18f4520.h: 4057: extern volatile bit RW @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f4520.h: 4059: extern volatile bit RX @ (((unsigned) &PORTC)*8) + 7;
[; ;pic18f4520.h: 4061: extern volatile bit RX9 @ (((unsigned) &RCSTA)*8) + 6;
[; ;pic18f4520.h: 4063: extern volatile bit RX9D @ (((unsigned) &RCSTA)*8) + 0;
[; ;pic18f4520.h: 4065: extern volatile bit RXCKP @ (((unsigned) &BAUDCON)*8) + 5;
[; ;pic18f4520.h: 4067: extern volatile bit RXDTP @ (((unsigned) &BAUDCON)*8) + 5;
[; ;pic18f4520.h: 4069: extern volatile bit R_NOT_W @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f4520.h: 4071: extern volatile bit R_W @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f4520.h: 4073: extern volatile bit R_nW @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f4520.h: 4075: extern volatile bit SBOREN @ (((unsigned) &RCON)*8) + 6;
[; ;pic18f4520.h: 4077: extern volatile bit SCK @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f4520.h: 4079: extern volatile bit SCKP @ (((unsigned) &BAUDCON)*8) + 4;
[; ;pic18f4520.h: 4081: extern volatile bit SCL @ (((unsigned) &PORTC)*8) + 3;
[; ;pic18f4520.h: 4083: extern volatile bit SCS0 @ (((unsigned) &OSCCON)*8) + 0;
[; ;pic18f4520.h: 4085: extern volatile bit SCS1 @ (((unsigned) &OSCCON)*8) + 1;
[; ;pic18f4520.h: 4087: extern volatile bit SDA @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f4520.h: 4089: extern volatile bit SDI @ (((unsigned) &PORTC)*8) + 4;
[; ;pic18f4520.h: 4091: extern volatile bit SDO @ (((unsigned) &PORTC)*8) + 5;
[; ;pic18f4520.h: 4093: extern volatile bit SEN @ (((unsigned) &SSPCON2)*8) + 0;
[; ;pic18f4520.h: 4095: extern volatile bit SENDB @ (((unsigned) &TXSTA)*8) + 3;
[; ;pic18f4520.h: 4097: extern volatile bit SENDB1 @ (((unsigned) &TXSTA)*8) + 3;
[; ;pic18f4520.h: 4099: extern volatile bit SMP @ (((unsigned) &SSPSTAT)*8) + 7;
[; ;pic18f4520.h: 4101: extern volatile bit SOSCEN @ (((unsigned) &T1CON)*8) + 3;
[; ;pic18f4520.h: 4103: extern volatile bit SOSCEN3 @ (((unsigned) &T3CON)*8) + 3;
[; ;pic18f4520.h: 4105: extern volatile bit SP0 @ (((unsigned) &STKPTR)*8) + 0;
[; ;pic18f4520.h: 4107: extern volatile bit SP1 @ (((unsigned) &STKPTR)*8) + 1;
[; ;pic18f4520.h: 4109: extern volatile bit SP2 @ (((unsigned) &STKPTR)*8) + 2;
[; ;pic18f4520.h: 4111: extern volatile bit SP3 @ (((unsigned) &STKPTR)*8) + 3;
[; ;pic18f4520.h: 4113: extern volatile bit SP4 @ (((unsigned) &STKPTR)*8) + 4;
[; ;pic18f4520.h: 4115: extern volatile bit SPEN @ (((unsigned) &RCSTA)*8) + 7;
[; ;pic18f4520.h: 4117: extern volatile bit SREN @ (((unsigned) &RCSTA)*8) + 5;
[; ;pic18f4520.h: 4119: extern volatile bit SRENA @ (((unsigned) &RCSTA)*8) + 5;
[; ;pic18f4520.h: 4121: extern volatile bit SS @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f4520.h: 4123: extern volatile bit SS2 @ (((unsigned) &PORTD)*8) + 7;
[; ;pic18f4520.h: 4125: extern volatile bit SSPEN @ (((unsigned) &SSPCON1)*8) + 5;
[; ;pic18f4520.h: 4127: extern volatile bit SSPIE @ (((unsigned) &PIE1)*8) + 3;
[; ;pic18f4520.h: 4129: extern volatile bit SSPIF @ (((unsigned) &PIR1)*8) + 3;
[; ;pic18f4520.h: 4131: extern volatile bit SSPIP @ (((unsigned) &IPR1)*8) + 3;
[; ;pic18f4520.h: 4133: extern volatile bit SSPM0 @ (((unsigned) &SSPCON1)*8) + 0;
[; ;pic18f4520.h: 4135: extern volatile bit SSPM1 @ (((unsigned) &SSPCON1)*8) + 1;
[; ;pic18f4520.h: 4137: extern volatile bit SSPM2 @ (((unsigned) &SSPCON1)*8) + 2;
[; ;pic18f4520.h: 4139: extern volatile bit SSPM3 @ (((unsigned) &SSPCON1)*8) + 3;
[; ;pic18f4520.h: 4141: extern volatile bit SSPOV @ (((unsigned) &SSPCON1)*8) + 6;
[; ;pic18f4520.h: 4143: extern volatile bit START @ (((unsigned) &SSPSTAT)*8) + 3;
[; ;pic18f4520.h: 4145: extern volatile bit STKFUL @ (((unsigned) &STKPTR)*8) + 7;
[; ;pic18f4520.h: 4147: extern volatile bit STKOVF @ (((unsigned) &STKPTR)*8) + 7;
[; ;pic18f4520.h: 4149: extern volatile bit STKUNF @ (((unsigned) &STKPTR)*8) + 6;
[; ;pic18f4520.h: 4151: extern volatile bit STOP @ (((unsigned) &SSPSTAT)*8) + 4;
[; ;pic18f4520.h: 4153: extern volatile bit SWDTE @ (((unsigned) &WDTCON)*8) + 0;
[; ;pic18f4520.h: 4155: extern volatile bit SWDTEN @ (((unsigned) &WDTCON)*8) + 0;
[; ;pic18f4520.h: 4157: extern volatile bit SYNC @ (((unsigned) &TXSTA)*8) + 4;
[; ;pic18f4520.h: 4159: extern volatile bit SYNC1 @ (((unsigned) &TXSTA)*8) + 4;
[; ;pic18f4520.h: 4161: extern volatile bit T016BIT @ (((unsigned) &T0CON)*8) + 6;
[; ;pic18f4520.h: 4163: extern volatile bit T08BIT @ (((unsigned) &T0CON)*8) + 6;
[; ;pic18f4520.h: 4165: extern volatile bit T0CKI @ (((unsigned) &PORTA)*8) + 4;
[; ;pic18f4520.h: 4167: extern volatile bit T0CS @ (((unsigned) &T0CON)*8) + 5;
[; ;pic18f4520.h: 4169: extern volatile bit T0IE @ (((unsigned) &INTCON)*8) + 5;
[; ;pic18f4520.h: 4171: extern volatile bit T0IF @ (((unsigned) &INTCON)*8) + 2;
[; ;pic18f4520.h: 4173: extern volatile bit T0PS0 @ (((unsigned) &T0CON)*8) + 0;
[; ;pic18f4520.h: 4175: extern volatile bit T0PS1 @ (((unsigned) &T0CON)*8) + 1;
[; ;pic18f4520.h: 4177: extern volatile bit T0PS2 @ (((unsigned) &T0CON)*8) + 2;
[; ;pic18f4520.h: 4179: extern volatile bit T0PS3 @ (((unsigned) &T0CON)*8) + 3;
[; ;pic18f4520.h: 4181: extern volatile bit T0SE @ (((unsigned) &T0CON)*8) + 4;
[; ;pic18f4520.h: 4183: extern volatile bit T13CKI @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f4520.h: 4185: extern volatile bit T1CKI @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f4520.h: 4187: extern volatile bit T1CKPS0 @ (((unsigned) &T1CON)*8) + 4;
[; ;pic18f4520.h: 4189: extern volatile bit T1CKPS1 @ (((unsigned) &T1CON)*8) + 5;
[; ;pic18f4520.h: 4191: extern volatile bit T1OSCEN @ (((unsigned) &T1CON)*8) + 3;
[; ;pic18f4520.h: 4193: extern volatile bit T1OSI @ (((unsigned) &PORTC)*8) + 1;
[; ;pic18f4520.h: 4195: extern volatile bit T1OSO @ (((unsigned) &PORTC)*8) + 0;
[; ;pic18f4520.h: 4197: extern volatile bit T1RD16 @ (((unsigned) &T1CON)*8) + 7;
[; ;pic18f4520.h: 4199: extern volatile bit T1RUN @ (((unsigned) &T1CON)*8) + 6;
[; ;pic18f4520.h: 4201: extern volatile bit T1SYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic18f4520.h: 4203: extern volatile bit T2CKPS0 @ (((unsigned) &T2CON)*8) + 0;
[; ;pic18f4520.h: 4205: extern volatile bit T2CKPS1 @ (((unsigned) &T2CON)*8) + 1;
[; ;pic18f4520.h: 4207: extern volatile bit T2OUTPS0 @ (((unsigned) &T2CON)*8) + 3;
[; ;pic18f4520.h: 4209: extern volatile bit T2OUTPS1 @ (((unsigned) &T2CON)*8) + 4;
[; ;pic18f4520.h: 4211: extern volatile bit T2OUTPS2 @ (((unsigned) &T2CON)*8) + 5;
[; ;pic18f4520.h: 4213: extern volatile bit T2OUTPS3 @ (((unsigned) &T2CON)*8) + 6;
[; ;pic18f4520.h: 4215: extern volatile bit T3CCP1 @ (((unsigned) &T3CON)*8) + 3;
[; ;pic18f4520.h: 4217: extern volatile bit T3CCP2 @ (((unsigned) &T3CON)*8) + 6;
[; ;pic18f4520.h: 4219: extern volatile bit T3CKPS0 @ (((unsigned) &T3CON)*8) + 4;
[; ;pic18f4520.h: 4221: extern volatile bit T3CKPS1 @ (((unsigned) &T3CON)*8) + 5;
[; ;pic18f4520.h: 4223: extern volatile bit T3RD16 @ (((unsigned) &T3CON)*8) + 7;
[; ;pic18f4520.h: 4225: extern volatile bit T3SYNC @ (((unsigned) &T3CON)*8) + 2;
[; ;pic18f4520.h: 4227: extern volatile bit TMR0IE @ (((unsigned) &INTCON)*8) + 5;
[; ;pic18f4520.h: 4229: extern volatile bit TMR0IF @ (((unsigned) &INTCON)*8) + 2;
[; ;pic18f4520.h: 4231: extern volatile bit TMR0IP @ (((unsigned) &INTCON2)*8) + 2;
[; ;pic18f4520.h: 4233: extern volatile bit TMR0ON @ (((unsigned) &T0CON)*8) + 7;
[; ;pic18f4520.h: 4235: extern volatile bit TMR1CS @ (((unsigned) &T1CON)*8) + 1;
[; ;pic18f4520.h: 4237: extern volatile bit TMR1IE @ (((unsigned) &PIE1)*8) + 0;
[; ;pic18f4520.h: 4239: extern volatile bit TMR1IF @ (((unsigned) &PIR1)*8) + 0;
[; ;pic18f4520.h: 4241: extern volatile bit TMR1IP @ (((unsigned) &IPR1)*8) + 0;
[; ;pic18f4520.h: 4243: extern volatile bit TMR1ON @ (((unsigned) &T1CON)*8) + 0;
[; ;pic18f4520.h: 4245: extern volatile bit TMR2IE @ (((unsigned) &PIE1)*8) + 1;
[; ;pic18f4520.h: 4247: extern volatile bit TMR2IF @ (((unsigned) &PIR1)*8) + 1;
[; ;pic18f4520.h: 4249: extern volatile bit TMR2IP @ (((unsigned) &IPR1)*8) + 1;
[; ;pic18f4520.h: 4251: extern volatile bit TMR2ON @ (((unsigned) &T2CON)*8) + 2;
[; ;pic18f4520.h: 4253: extern volatile bit TMR3CS @ (((unsigned) &T3CON)*8) + 1;
[; ;pic18f4520.h: 4255: extern volatile bit TMR3IE @ (((unsigned) &PIE2)*8) + 1;
[; ;pic18f4520.h: 4257: extern volatile bit TMR3IF @ (((unsigned) &PIR2)*8) + 1;
[; ;pic18f4520.h: 4259: extern volatile bit TMR3IP @ (((unsigned) &IPR2)*8) + 1;
[; ;pic18f4520.h: 4261: extern volatile bit TMR3ON @ (((unsigned) &T3CON)*8) + 0;
[; ;pic18f4520.h: 4263: extern volatile bit TO @ (((unsigned) &RCON)*8) + 3;
[; ;pic18f4520.h: 4265: extern volatile bit TOUTPS0 @ (((unsigned) &T2CON)*8) + 3;
[; ;pic18f4520.h: 4267: extern volatile bit TOUTPS1 @ (((unsigned) &T2CON)*8) + 4;
[; ;pic18f4520.h: 4269: extern volatile bit TOUTPS2 @ (((unsigned) &T2CON)*8) + 5;
[; ;pic18f4520.h: 4271: extern volatile bit TOUTPS3 @ (((unsigned) &T2CON)*8) + 6;
[; ;pic18f4520.h: 4273: extern volatile bit TRISA0 @ (((unsigned) &TRISA)*8) + 0;
[; ;pic18f4520.h: 4275: extern volatile bit TRISA1 @ (((unsigned) &TRISA)*8) + 1;
[; ;pic18f4520.h: 4277: extern volatile bit TRISA2 @ (((unsigned) &TRISA)*8) + 2;
[; ;pic18f4520.h: 4279: extern volatile bit TRISA3 @ (((unsigned) &TRISA)*8) + 3;
[; ;pic18f4520.h: 4281: extern volatile bit TRISA4 @ (((unsigned) &TRISA)*8) + 4;
[; ;pic18f4520.h: 4283: extern volatile bit TRISA5 @ (((unsigned) &TRISA)*8) + 5;
[; ;pic18f4520.h: 4285: extern volatile bit TRISA6 @ (((unsigned) &TRISA)*8) + 6;
[; ;pic18f4520.h: 4287: extern volatile bit TRISA7 @ (((unsigned) &TRISA)*8) + 7;
[; ;pic18f4520.h: 4289: extern volatile bit TRISB0 @ (((unsigned) &TRISB)*8) + 0;
[; ;pic18f4520.h: 4291: extern volatile bit TRISB1 @ (((unsigned) &TRISB)*8) + 1;
[; ;pic18f4520.h: 4293: extern volatile bit TRISB2 @ (((unsigned) &TRISB)*8) + 2;
[; ;pic18f4520.h: 4295: extern volatile bit TRISB3 @ (((unsigned) &TRISB)*8) + 3;
[; ;pic18f4520.h: 4297: extern volatile bit TRISB4 @ (((unsigned) &TRISB)*8) + 4;
[; ;pic18f4520.h: 4299: extern volatile bit TRISB5 @ (((unsigned) &TRISB)*8) + 5;
[; ;pic18f4520.h: 4301: extern volatile bit TRISB6 @ (((unsigned) &TRISB)*8) + 6;
[; ;pic18f4520.h: 4303: extern volatile bit TRISB7 @ (((unsigned) &TRISB)*8) + 7;
[; ;pic18f4520.h: 4305: extern volatile bit TRISC0 @ (((unsigned) &TRISC)*8) + 0;
[; ;pic18f4520.h: 4307: extern volatile bit TRISC1 @ (((unsigned) &TRISC)*8) + 1;
[; ;pic18f4520.h: 4309: extern volatile bit TRISC2 @ (((unsigned) &TRISC)*8) + 2;
[; ;pic18f4520.h: 4311: extern volatile bit TRISC3 @ (((unsigned) &TRISC)*8) + 3;
[; ;pic18f4520.h: 4313: extern volatile bit TRISC4 @ (((unsigned) &TRISC)*8) + 4;
[; ;pic18f4520.h: 4315: extern volatile bit TRISC5 @ (((unsigned) &TRISC)*8) + 5;
[; ;pic18f4520.h: 4317: extern volatile bit TRISC6 @ (((unsigned) &TRISC)*8) + 6;
[; ;pic18f4520.h: 4319: extern volatile bit TRISC7 @ (((unsigned) &TRISC)*8) + 7;
[; ;pic18f4520.h: 4321: extern volatile bit TRISD0 @ (((unsigned) &TRISD)*8) + 0;
[; ;pic18f4520.h: 4323: extern volatile bit TRISD1 @ (((unsigned) &TRISD)*8) + 1;
[; ;pic18f4520.h: 4325: extern volatile bit TRISD2 @ (((unsigned) &TRISD)*8) + 2;
[; ;pic18f4520.h: 4327: extern volatile bit TRISD3 @ (((unsigned) &TRISD)*8) + 3;
[; ;pic18f4520.h: 4329: extern volatile bit TRISD4 @ (((unsigned) &TRISD)*8) + 4;
[; ;pic18f4520.h: 4331: extern volatile bit TRISD5 @ (((unsigned) &TRISD)*8) + 5;
[; ;pic18f4520.h: 4333: extern volatile bit TRISD6 @ (((unsigned) &TRISD)*8) + 6;
[; ;pic18f4520.h: 4335: extern volatile bit TRISD7 @ (((unsigned) &TRISD)*8) + 7;
[; ;pic18f4520.h: 4337: extern volatile bit TRISE0 @ (((unsigned) &TRISE)*8) + 0;
[; ;pic18f4520.h: 4339: extern volatile bit TRISE1 @ (((unsigned) &TRISE)*8) + 1;
[; ;pic18f4520.h: 4341: extern volatile bit TRISE2 @ (((unsigned) &TRISE)*8) + 2;
[; ;pic18f4520.h: 4343: extern volatile bit TRMT @ (((unsigned) &TXSTA)*8) + 1;
[; ;pic18f4520.h: 4345: extern volatile bit TRMT1 @ (((unsigned) &TXSTA)*8) + 1;
[; ;pic18f4520.h: 4347: extern volatile bit TUN0 @ (((unsigned) &OSCTUNE)*8) + 0;
[; ;pic18f4520.h: 4349: extern volatile bit TUN1 @ (((unsigned) &OSCTUNE)*8) + 1;
[; ;pic18f4520.h: 4351: extern volatile bit TUN2 @ (((unsigned) &OSCTUNE)*8) + 2;
[; ;pic18f4520.h: 4353: extern volatile bit TUN3 @ (((unsigned) &OSCTUNE)*8) + 3;
[; ;pic18f4520.h: 4355: extern volatile bit TUN4 @ (((unsigned) &OSCTUNE)*8) + 4;
[; ;pic18f4520.h: 4357: extern volatile bit TX @ (((unsigned) &PORTC)*8) + 6;
[; ;pic18f4520.h: 4359: extern volatile bit TX1IE @ (((unsigned) &PIE1)*8) + 4;
[; ;pic18f4520.h: 4361: extern volatile bit TX1IF @ (((unsigned) &PIR1)*8) + 4;
[; ;pic18f4520.h: 4363: extern volatile bit TX1IP @ (((unsigned) &IPR1)*8) + 4;
[; ;pic18f4520.h: 4365: extern volatile bit TX9 @ (((unsigned) &TXSTA)*8) + 6;
[; ;pic18f4520.h: 4367: extern volatile bit TX91 @ (((unsigned) &TXSTA)*8) + 6;
[; ;pic18f4520.h: 4369: extern volatile bit TX9D @ (((unsigned) &TXSTA)*8) + 0;
[; ;pic18f4520.h: 4371: extern volatile bit TX9D1 @ (((unsigned) &TXSTA)*8) + 0;
[; ;pic18f4520.h: 4373: extern volatile bit TXCKP @ (((unsigned) &BAUDCON)*8) + 4;
[; ;pic18f4520.h: 4375: extern volatile bit TXEN @ (((unsigned) &TXSTA)*8) + 5;
[; ;pic18f4520.h: 4377: extern volatile bit TXEN1 @ (((unsigned) &TXSTA)*8) + 5;
[; ;pic18f4520.h: 4379: extern volatile bit TXIE @ (((unsigned) &PIE1)*8) + 4;
[; ;pic18f4520.h: 4381: extern volatile bit TXIF @ (((unsigned) &PIR1)*8) + 4;
[; ;pic18f4520.h: 4383: extern volatile bit TXIP @ (((unsigned) &IPR1)*8) + 4;
[; ;pic18f4520.h: 4385: extern volatile bit UA @ (((unsigned) &SSPSTAT)*8) + 1;
[; ;pic18f4520.h: 4387: extern volatile bit ULPWUIN @ (((unsigned) &PORTA)*8) + 0;
[; ;pic18f4520.h: 4389: extern volatile bit VCFG0 @ (((unsigned) &ADCON1)*8) + 4;
[; ;pic18f4520.h: 4391: extern volatile bit VCFG01 @ (((unsigned) &ADCON1)*8) + 4;
[; ;pic18f4520.h: 4393: extern volatile bit VCFG1 @ (((unsigned) &ADCON1)*8) + 5;
[; ;pic18f4520.h: 4395: extern volatile bit VCFG11 @ (((unsigned) &ADCON1)*8) + 5;
[; ;pic18f4520.h: 4397: extern volatile bit VDIRMAG @ (((unsigned) &HLVDCON)*8) + 7;
[; ;pic18f4520.h: 4399: extern volatile bit VPP @ (((unsigned) &PORTE)*8) + 3;
[; ;pic18f4520.h: 4401: extern volatile bit VREFN @ (((unsigned) &PORTA)*8) + 2;
[; ;pic18f4520.h: 4403: extern volatile bit VREFP @ (((unsigned) &PORTA)*8) + 3;
[; ;pic18f4520.h: 4405: extern volatile bit W4E @ (((unsigned) &BAUDCON)*8) + 1;
[; ;pic18f4520.h: 4407: extern volatile bit WCOL @ (((unsigned) &SSPCON1)*8) + 7;
[; ;pic18f4520.h: 4409: extern volatile bit __attribute__((__deprecated__)) WR @ (((unsigned) &EECON1)*8) + 1;
[; ;pic18f4520.h: 4411: extern volatile bit WRE @ (((unsigned) &PORTE)*8) + 1;
[; ;pic18f4520.h: 4413: extern volatile bit WREN @ (((unsigned) &EECON1)*8) + 2;
[; ;pic18f4520.h: 4415: extern volatile bit WRERR @ (((unsigned) &EECON1)*8) + 3;
[; ;pic18f4520.h: 4417: extern volatile bit WUE @ (((unsigned) &BAUDCON)*8) + 1;
[; ;pic18f4520.h: 4419: extern volatile bit ZERO @ (((unsigned) &STATUS)*8) + 2;
[; ;pic18f4520.h: 4421: extern volatile bit nA @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f4520.h: 4423: extern volatile bit nADDRESS @ (((unsigned) &SSPSTAT)*8) + 5;
[; ;pic18f4520.h: 4425: extern volatile bit nBOR @ (((unsigned) &RCON)*8) + 0;
[; ;pic18f4520.h: 4427: extern volatile bit nCS @ (((unsigned) &PORTE)*8) + 2;
[; ;pic18f4520.h: 4429: extern volatile bit nDONE @ (((unsigned) &ADCON0)*8) + 1;
[; ;pic18f4520.h: 4431: extern volatile bit nMCLR @ (((unsigned) &PORTE)*8) + 3;
[; ;pic18f4520.h: 4433: extern volatile bit nPD @ (((unsigned) &RCON)*8) + 2;
[; ;pic18f4520.h: 4435: extern volatile bit nPOR @ (((unsigned) &RCON)*8) + 1;
[; ;pic18f4520.h: 4437: extern volatile bit nRBPU @ (((unsigned) &INTCON2)*8) + 7;
[; ;pic18f4520.h: 4439: extern volatile bit nRD @ (((unsigned) &PORTE)*8) + 0;
[; ;pic18f4520.h: 4441: extern volatile bit nRI @ (((unsigned) &RCON)*8) + 4;
[; ;pic18f4520.h: 4443: extern volatile bit nSS @ (((unsigned) &PORTA)*8) + 5;
[; ;pic18f4520.h: 4445: extern volatile bit nT1SYNC @ (((unsigned) &T1CON)*8) + 2;
[; ;pic18f4520.h: 4447: extern volatile bit nT3SYNC @ (((unsigned) &T3CON)*8) + 2;
[; ;pic18f4520.h: 4449: extern volatile bit nTO @ (((unsigned) &RCON)*8) + 3;
[; ;pic18f4520.h: 4451: extern volatile bit nW @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;pic18f4520.h: 4453: extern volatile bit nWR @ (((unsigned) &PORTE)*8) + 1;
[; ;pic18f4520.h: 4455: extern volatile bit nWRITE @ (((unsigned) &SSPSTAT)*8) + 2;
[; ;adc.h: 971: union ADCResult
[; ;adc.h: 972: {
[; ;adc.h: 973: int lr;
[; ;adc.h: 974: char br[2];
[; ;adc.h: 975: };
[; ;adc.h: 977: char BusyADC (void);
[; ;adc.h: 979: void ConvertADC (void);
[; ;adc.h: 981: int ReadADC(void);
[; ;adc.h: 983: void CloseADC(void);
[; ;adc.h: 996: void OpenADC ( unsigned char ,
[; ;adc.h: 997: unsigned char ,
[; ;adc.h: 998: unsigned char );
[; ;adc.h: 1028: void SetChanADC(unsigned char );
[; ;adc.h: 1031: void SelChanConvADC( unsigned char );
[; ;ancomp.h: 38: void Close_ancomp( void );
[; ;ancomp.h: 39: void Open_ancomp(unsigned char config);
[; ;spi.h: 584: void OpenSPI( unsigned char sync_mode,
[; ;spi.h: 585: unsigned char bus_mode,
[; ;spi.h: 586: unsigned char smp_phase );
[; ;spi.h: 588: unsigned char WriteSPI( unsigned char data_out );
[; ;spi.h: 590: void getsSPI( unsigned char *rdptr, unsigned char length );
[; ;spi.h: 592: void putsSPI( unsigned char *wrptr );
[; ;spi.h: 594: unsigned char ReadSPI( void );
[; ;can2510.h: 414: void CAN2510Initialize(  unsigned int configuration,
[; ;can2510.h: 415: unsigned char brp,
[; ;can2510.h: 416: unsigned char interruptFlags,
[; ;can2510.h: 417: unsigned char SPI_syncMode,
[; ;can2510.h: 418: unsigned char SPI_busMode,
[; ;can2510.h: 419: unsigned char SPI_smpPhase );
[; ;can2510.h: 421: unsigned char CAN2510Init(  unsigned short long BufferConfig,
[; ;can2510.h: 422: unsigned short long BitTimeConfig,
[; ;can2510.h: 423: unsigned char interruptEnables,
[; ;can2510.h: 424: unsigned char SPI_syncMode,
[; ;can2510.h: 425: unsigned char SPI_busMode,
[; ;can2510.h: 426: unsigned char SPI_smpPhase );
[; ;can2510.h: 428: void CAN2510Enable( void );
[; ;can2510.h: 430: void CAN2510Disable( void );
[; ;can2510.h: 432: void CAN2510Reset( void );
[; ;can2510.h: 434: void CAN2510SetMode(  unsigned char mode );
[; ;can2510.h: 436: unsigned char CAN2510ReadMode( void );
[; ;can2510.h: 438: unsigned char CAN2510ReadStatus( void );
[; ;can2510.h: 440: unsigned char CAN2510ErrorState( void );
[; ;can2510.h: 442: unsigned char CAN2510InterruptStatus( void );
[; ;can2510.h: 444: void CAN2510InterruptEnable( unsigned char interruptFlags );
[; ;can2510.h: 446: unsigned char CAN2510ByteRead(  unsigned char addr );
[; ;can2510.h: 448: void CAN2510ByteWrite(  unsigned char addr,  unsigned char value );
[; ;can2510.h: 450: void CAN2510SequentialRead(  unsigned char *DataArray,
[; ;can2510.h: 451: unsigned char CAN2510addr,
[; ;can2510.h: 452: unsigned char numbytes );
[; ;can2510.h: 454: void CAN2510SequentialWrite(  unsigned char *DataArray,
[; ;can2510.h: 455: unsigned char CAN2510addr,
[; ;can2510.h: 456: unsigned char numbytes );
[; ;can2510.h: 458: void CAN2510BitModify(  unsigned char address,
[; ;can2510.h: 459: unsigned char mask,
[; ;can2510.h: 460: unsigned char data );
[; ;can2510.h: 462: void CAN2510SetSingleMaskStd(  unsigned char maskNum,  unsigned int mask );
[; ;can2510.h: 464: void CAN2510SetSingleMaskXtd(  unsigned char maskNum,  unsigned long mask );
[; ;can2510.h: 466: void CAN2510SetSingleFilterStd(  unsigned char filterNum,  unsigned int filter );
[; ;can2510.h: 468: void CAN2510SetSingleFilterXtd(  unsigned char filterNum,  unsigned long filter );
[; ;can2510.h: 470: unsigned char CAN2510SetMsgFilterStd(  unsigned char bufferNum,
[; ;can2510.h: 471: unsigned int mask,
[; ;can2510.h: 472: unsigned int *filters );
[; ;can2510.h: 474: unsigned char CAN2510SetMsgFilterXtd(  unsigned char bufferNum,
[; ;can2510.h: 475: unsigned long mask,
[; ;can2510.h: 476: unsigned long *filters );
[; ;can2510.h: 478: unsigned char CAN2510WriteStd(  unsigned int msgId,
[; ;can2510.h: 479: unsigned char msgPriority,
[; ;can2510.h: 480: unsigned char numBytes,
[; ;can2510.h: 481: unsigned char *data );
[; ;can2510.h: 483: unsigned char CAN2510WriteXtd(  unsigned long msgId,
[; ;can2510.h: 484: unsigned char msgPriority,
[; ;can2510.h: 485: unsigned char numBytes,
[; ;can2510.h: 486: unsigned char *data );
[; ;can2510.h: 488: void CAN2510LoadBufferStd(  unsigned char bufferNum,
[; ;can2510.h: 489: unsigned int msgId,
[; ;can2510.h: 490: unsigned char numBytes,
[; ;can2510.h: 491: unsigned char *data );
[; ;can2510.h: 493: void CAN2510LoadBufferXtd(  unsigned char bufferNum,
[; ;can2510.h: 494: unsigned long msgId,
[; ;can2510.h: 495: unsigned char numBytes,
[; ;can2510.h: 496: unsigned char *data );
[; ;can2510.h: 498: void CAN2510LoadRTRStd(  unsigned char bufferNum,
[; ;can2510.h: 499: unsigned int msgId,
[; ;can2510.h: 500: unsigned char numBytes );
[; ;can2510.h: 502: void CAN2510LoadRTRXtd(  unsigned char bufferNum,
[; ;can2510.h: 503: unsigned long msgId,
[; ;can2510.h: 504: unsigned char numBytes );
[; ;can2510.h: 506: void CAN2510SetBufferPriority(  unsigned char bufferNum,
[; ;can2510.h: 507: unsigned char bufferPriority );
[; ;can2510.h: 509: void CAN2510SendBuffer(  unsigned char bufferNumber );
[; ;can2510.h: 511: unsigned char CAN2510WriteBuffer(  unsigned char bufferNum );
[; ;can2510.h: 513: unsigned char CAN2510DataReady(  unsigned char bufferNum );
[; ;can2510.h: 515: unsigned char CAN2510DataRead(  unsigned char bufferNum,
[; ;can2510.h: 516: unsigned long *msgId,
[; ;can2510.h: 517: unsigned char *numBytes,
[; ;can2510.h: 518: unsigned char *data );
[; ;capture.h: 64: union capstatus
[; ;capture.h: 65: {
[; ;capture.h: 72: struct
[; ;capture.h: 73: {
[; ;capture.h: 76: unsigned Cap1OVF:1;
[; ;capture.h: 81: unsigned Cap2OVF:1;
[; ;capture.h: 114: };
[; ;capture.h: 116: unsigned :8;
[; ;capture.h: 118: };
[; ;capture.h: 120: extern union capstatus CapStatus;
[; ;capture.h: 122: union CapResult
[; ;capture.h: 123: {
[; ;capture.h: 124: unsigned int lc;
[; ;capture.h: 125: char bc[2];
[; ;capture.h: 126: };
[; ;capture.h: 425: void OpenCapture1 ( unsigned char config);
[; ;capture.h: 426: unsigned int ReadCapture1 (void);
[; ;capture.h: 427: void CloseCapture1 (void);
[; ;capture.h: 435: void OpenCapture2 ( unsigned char config);
[; ;capture.h: 436: unsigned int ReadCapture2 (void);
[; ;capture.h: 437: void CloseCapture2 (void);
[; ;compare.h: 336: void OpenCompare1(unsigned char config,unsigned int period);
[; ;compare.h: 337: void CloseCompare1(void);
[; ;compare.h: 343: void OpenCompare2(unsigned char config, unsigned int period);
[; ;compare.h: 344: void CloseCompare2(void);
[; ;EEP.h: 36: void Busy_eep ( void );
[; ;EEP.h: 37: unsigned char Read_b_eep( unsigned int badd );
[; ;EEP.h: 38: void Write_b_eep( unsigned int badd, unsigned char bdata );
[; ;stddef.h: 2: typedef int ptrdiff_t;
[; ;stddef.h: 3: typedef unsigned size_t;
[; ;stddef.h: 4: typedef unsigned short wchar_t;
[; ;stddef.h: 13: extern int errno;
[; ;GenericTypeDefs.h: 65: typedef enum _BOOL { FALSE = 0, TRUE } BOOL;
[; ;GenericTypeDefs.h: 68: typedef enum _BIT { CLEAR = 0, SET } BIT;
[; ;GenericTypeDefs.h: 75: typedef signed int INT;
[; ;GenericTypeDefs.h: 76: typedef signed char INT8;
[; ;GenericTypeDefs.h: 77: typedef signed short int INT16;
[; ;GenericTypeDefs.h: 78: typedef signed long int INT32;
[; ;GenericTypeDefs.h: 82: typedef signed long long INT64;
[; ;GenericTypeDefs.h: 86: typedef unsigned int UINT;
[; ;GenericTypeDefs.h: 87: typedef unsigned char UINT8;
[; ;GenericTypeDefs.h: 88: typedef unsigned short int UINT16;
[; ;GenericTypeDefs.h: 93: typedef unsigned long int UINT32;
[; ;GenericTypeDefs.h: 96: typedef unsigned long long UINT64;
[; ;GenericTypeDefs.h: 99: typedef union
[; ;GenericTypeDefs.h: 100: {
[; ;GenericTypeDefs.h: 101: UINT8 Val;
[; ;GenericTypeDefs.h: 102: struct
[; ;GenericTypeDefs.h: 103: {
[; ;GenericTypeDefs.h: 104: UINT8 b0:1;
[; ;GenericTypeDefs.h: 105: UINT8 b1:1;
[; ;GenericTypeDefs.h: 106: UINT8 b2:1;
[; ;GenericTypeDefs.h: 107: UINT8 b3:1;
[; ;GenericTypeDefs.h: 108: UINT8 b4:1;
[; ;GenericTypeDefs.h: 109: UINT8 b5:1;
[; ;GenericTypeDefs.h: 110: UINT8 b6:1;
[; ;GenericTypeDefs.h: 111: UINT8 b7:1;
[; ;GenericTypeDefs.h: 112: } bits;
[; ;GenericTypeDefs.h: 113: } UINT8_VAL, UINT8_BITS;
[; ;GenericTypeDefs.h: 115: typedef union
[; ;GenericTypeDefs.h: 116: {
[; ;GenericTypeDefs.h: 117: UINT16 Val;
[; ;GenericTypeDefs.h: 118: UINT8 v[2] ;
[; ;GenericTypeDefs.h: 119: struct 
[; ;GenericTypeDefs.h: 120: {
[; ;GenericTypeDefs.h: 121: UINT8 LB;
[; ;GenericTypeDefs.h: 122: UINT8 HB;
[; ;GenericTypeDefs.h: 123: } byte;
[; ;GenericTypeDefs.h: 124: struct 
[; ;GenericTypeDefs.h: 125: {
[; ;GenericTypeDefs.h: 126: UINT8 b0:1;
[; ;GenericTypeDefs.h: 127: UINT8 b1:1;
[; ;GenericTypeDefs.h: 128: UINT8 b2:1;
[; ;GenericTypeDefs.h: 129: UINT8 b3:1;
[; ;GenericTypeDefs.h: 130: UINT8 b4:1;
[; ;GenericTypeDefs.h: 131: UINT8 b5:1;
[; ;GenericTypeDefs.h: 132: UINT8 b6:1;
[; ;GenericTypeDefs.h: 133: UINT8 b7:1;
[; ;GenericTypeDefs.h: 134: UINT8 b8:1;
[; ;GenericTypeDefs.h: 135: UINT8 b9:1;
[; ;GenericTypeDefs.h: 136: UINT8 b10:1;
[; ;GenericTypeDefs.h: 137: UINT8 b11:1;
[; ;GenericTypeDefs.h: 138: UINT8 b12:1;
[; ;GenericTypeDefs.h: 139: UINT8 b13:1;
[; ;GenericTypeDefs.h: 140: UINT8 b14:1;
[; ;GenericTypeDefs.h: 141: UINT8 b15:1;
[; ;GenericTypeDefs.h: 142: } bits;
[; ;GenericTypeDefs.h: 143: } UINT16_VAL, UINT16_BITS;
[; ;GenericTypeDefs.h: 187: typedef union
[; ;GenericTypeDefs.h: 188: {
[; ;GenericTypeDefs.h: 189: UINT32 Val;
[; ;GenericTypeDefs.h: 190: UINT16 w[2] ;
[; ;GenericTypeDefs.h: 191: UINT8 v[4] ;
[; ;GenericTypeDefs.h: 192: struct 
[; ;GenericTypeDefs.h: 193: {
[; ;GenericTypeDefs.h: 194: UINT16 LW;
[; ;GenericTypeDefs.h: 195: UINT16 HW;
[; ;GenericTypeDefs.h: 196: } word;
[; ;GenericTypeDefs.h: 197: struct 
[; ;GenericTypeDefs.h: 198: {
[; ;GenericTypeDefs.h: 199: UINT8 LB;
[; ;GenericTypeDefs.h: 200: UINT8 HB;
[; ;GenericTypeDefs.h: 201: UINT8 UB;
[; ;GenericTypeDefs.h: 202: UINT8 MB;
[; ;GenericTypeDefs.h: 203: } byte;
[; ;GenericTypeDefs.h: 204: struct 
[; ;GenericTypeDefs.h: 205: {
[; ;GenericTypeDefs.h: 206: UINT16_VAL low;
[; ;GenericTypeDefs.h: 207: UINT16_VAL high;
[; ;GenericTypeDefs.h: 208: }wordUnion;
[; ;GenericTypeDefs.h: 209: struct 
[; ;GenericTypeDefs.h: 210: {
[; ;GenericTypeDefs.h: 211: UINT8 b0:1;
[; ;GenericTypeDefs.h: 212: UINT8 b1:1;
[; ;GenericTypeDefs.h: 213: UINT8 b2:1;
[; ;GenericTypeDefs.h: 214: UINT8 b3:1;
[; ;GenericTypeDefs.h: 215: UINT8 b4:1;
[; ;GenericTypeDefs.h: 216: UINT8 b5:1;
[; ;GenericTypeDefs.h: 217: UINT8 b6:1;
[; ;GenericTypeDefs.h: 218: UINT8 b7:1;
[; ;GenericTypeDefs.h: 219: UINT8 b8:1;
[; ;GenericTypeDefs.h: 220: UINT8 b9:1;
[; ;GenericTypeDefs.h: 221: UINT8 b10:1;
[; ;GenericTypeDefs.h: 222: UINT8 b11:1;
[; ;GenericTypeDefs.h: 223: UINT8 b12:1;
[; ;GenericTypeDefs.h: 224: UINT8 b13:1;
[; ;GenericTypeDefs.h: 225: UINT8 b14:1;
[; ;GenericTypeDefs.h: 226: UINT8 b15:1;
[; ;GenericTypeDefs.h: 227: UINT8 b16:1;
[; ;GenericTypeDefs.h: 228: UINT8 b17:1;
[; ;GenericTypeDefs.h: 229: UINT8 b18:1;
[; ;GenericTypeDefs.h: 230: UINT8 b19:1;
[; ;GenericTypeDefs.h: 231: UINT8 b20:1;
[; ;GenericTypeDefs.h: 232: UINT8 b21:1;
[; ;GenericTypeDefs.h: 233: UINT8 b22:1;
[; ;GenericTypeDefs.h: 234: UINT8 b23:1;
[; ;GenericTypeDefs.h: 235: UINT8 b24:1;
[; ;GenericTypeDefs.h: 236: UINT8 b25:1;
[; ;GenericTypeDefs.h: 237: UINT8 b26:1;
[; ;GenericTypeDefs.h: 238: UINT8 b27:1;
[; ;GenericTypeDefs.h: 239: UINT8 b28:1;
[; ;GenericTypeDefs.h: 240: UINT8 b29:1;
[; ;GenericTypeDefs.h: 241: UINT8 b30:1;
[; ;GenericTypeDefs.h: 242: UINT8 b31:1;
[; ;GenericTypeDefs.h: 243: } bits;
[; ;GenericTypeDefs.h: 244: } UINT32_VAL;
[; ;GenericTypeDefs.h: 248: typedef union
[; ;GenericTypeDefs.h: 249: {
[; ;GenericTypeDefs.h: 250: UINT64 Val;
[; ;GenericTypeDefs.h: 251: UINT32 d[2] ;
[; ;GenericTypeDefs.h: 252: UINT16 w[4] ;
[; ;GenericTypeDefs.h: 253: UINT8 v[8] ;
[; ;GenericTypeDefs.h: 254: struct 
[; ;GenericTypeDefs.h: 255: {
[; ;GenericTypeDefs.h: 256: UINT32 LD;
[; ;GenericTypeDefs.h: 257: UINT32 HD;
[; ;GenericTypeDefs.h: 258: } dword;
[; ;GenericTypeDefs.h: 259: struct 
[; ;GenericTypeDefs.h: 260: {
[; ;GenericTypeDefs.h: 261: UINT16 LW;
[; ;GenericTypeDefs.h: 262: UINT16 HW;
[; ;GenericTypeDefs.h: 263: UINT16 UW;
[; ;GenericTypeDefs.h: 264: UINT16 MW;
[; ;GenericTypeDefs.h: 265: } word;
[; ;GenericTypeDefs.h: 266: struct 
[; ;GenericTypeDefs.h: 267: {
[; ;GenericTypeDefs.h: 268: UINT8 b0:1;
[; ;GenericTypeDefs.h: 269: UINT8 b1:1;
[; ;GenericTypeDefs.h: 270: UINT8 b2:1;
[; ;GenericTypeDefs.h: 271: UINT8 b3:1;
[; ;GenericTypeDefs.h: 272: UINT8 b4:1;
[; ;GenericTypeDefs.h: 273: UINT8 b5:1;
[; ;GenericTypeDefs.h: 274: UINT8 b6:1;
[; ;GenericTypeDefs.h: 275: UINT8 b7:1;
[; ;GenericTypeDefs.h: 276: UINT8 b8:1;
[; ;GenericTypeDefs.h: 277: UINT8 b9:1;
[; ;GenericTypeDefs.h: 278: UINT8 b10:1;
[; ;GenericTypeDefs.h: 279: UINT8 b11:1;
[; ;GenericTypeDefs.h: 280: UINT8 b12:1;
[; ;GenericTypeDefs.h: 281: UINT8 b13:1;
[; ;GenericTypeDefs.h: 282: UINT8 b14:1;
[; ;GenericTypeDefs.h: 283: UINT8 b15:1;
[; ;GenericTypeDefs.h: 284: UINT8 b16:1;
[; ;GenericTypeDefs.h: 285: UINT8 b17:1;
[; ;GenericTypeDefs.h: 286: UINT8 b18:1;
[; ;GenericTypeDefs.h: 287: UINT8 b19:1;
[; ;GenericTypeDefs.h: 288: UINT8 b20:1;
[; ;GenericTypeDefs.h: 289: UINT8 b21:1;
[; ;GenericTypeDefs.h: 290: UINT8 b22:1;
[; ;GenericTypeDefs.h: 291: UINT8 b23:1;
[; ;GenericTypeDefs.h: 292: UINT8 b24:1;
[; ;GenericTypeDefs.h: 293: UINT8 b25:1;
[; ;GenericTypeDefs.h: 294: UINT8 b26:1;
[; ;GenericTypeDefs.h: 295: UINT8 b27:1;
[; ;GenericTypeDefs.h: 296: UINT8 b28:1;
[; ;GenericTypeDefs.h: 297: UINT8 b29:1;
[; ;GenericTypeDefs.h: 298: UINT8 b30:1;
[; ;GenericTypeDefs.h: 299: UINT8 b31:1;
[; ;GenericTypeDefs.h: 300: UINT8 b32:1;
[; ;GenericTypeDefs.h: 301: UINT8 b33:1;
[; ;GenericTypeDefs.h: 302: UINT8 b34:1;
[; ;GenericTypeDefs.h: 303: UINT8 b35:1;
[; ;GenericTypeDefs.h: 304: UINT8 b36:1;
[; ;GenericTypeDefs.h: 305: UINT8 b37:1;
[; ;GenericTypeDefs.h: 306: UINT8 b38:1;
[; ;GenericTypeDefs.h: 307: UINT8 b39:1;
[; ;GenericTypeDefs.h: 308: UINT8 b40:1;
[; ;GenericTypeDefs.h: 309: UINT8 b41:1;
[; ;GenericTypeDefs.h: 310: UINT8 b42:1;
[; ;GenericTypeDefs.h: 311: UINT8 b43:1;
[; ;GenericTypeDefs.h: 312: UINT8 b44:1;
[; ;GenericTypeDefs.h: 313: UINT8 b45:1;
[; ;GenericTypeDefs.h: 314: UINT8 b46:1;
[; ;GenericTypeDefs.h: 315: UINT8 b47:1;
[; ;GenericTypeDefs.h: 316: UINT8 b48:1;
[; ;GenericTypeDefs.h: 317: UINT8 b49:1;
[; ;GenericTypeDefs.h: 318: UINT8 b50:1;
[; ;GenericTypeDefs.h: 319: UINT8 b51:1;
[; ;GenericTypeDefs.h: 320: UINT8 b52:1;
[; ;GenericTypeDefs.h: 321: UINT8 b53:1;
[; ;GenericTypeDefs.h: 322: UINT8 b54:1;
[; ;GenericTypeDefs.h: 323: UINT8 b55:1;
[; ;GenericTypeDefs.h: 324: UINT8 b56:1;
[; ;GenericTypeDefs.h: 325: UINT8 b57:1;
[; ;GenericTypeDefs.h: 326: UINT8 b58:1;
[; ;GenericTypeDefs.h: 327: UINT8 b59:1;
[; ;GenericTypeDefs.h: 328: UINT8 b60:1;
[; ;GenericTypeDefs.h: 329: UINT8 b61:1;
[; ;GenericTypeDefs.h: 330: UINT8 b62:1;
[; ;GenericTypeDefs.h: 331: UINT8 b63:1;
[; ;GenericTypeDefs.h: 332: } bits;
[; ;GenericTypeDefs.h: 333: } UINT64_VAL;
[; ;GenericTypeDefs.h: 339: typedef void VOID;
[; ;GenericTypeDefs.h: 341: typedef char CHAR8;
[; ;GenericTypeDefs.h: 342: typedef unsigned char UCHAR8;
[; ;GenericTypeDefs.h: 344: typedef unsigned char BYTE;
[; ;GenericTypeDefs.h: 345: typedef unsigned short int WORD;
[; ;GenericTypeDefs.h: 346: typedef unsigned long DWORD;
[; ;GenericTypeDefs.h: 349: typedef unsigned long long QWORD;
[; ;GenericTypeDefs.h: 350: typedef signed char CHAR;
[; ;GenericTypeDefs.h: 351: typedef signed short int SHORT;
[; ;GenericTypeDefs.h: 352: typedef signed long LONG;
[; ;GenericTypeDefs.h: 355: typedef signed long long LONGLONG;
[; ;GenericTypeDefs.h: 356: typedef union
[; ;GenericTypeDefs.h: 357: {
[; ;GenericTypeDefs.h: 358: BYTE Val;
[; ;GenericTypeDefs.h: 359: struct 
[; ;GenericTypeDefs.h: 360: {
[; ;GenericTypeDefs.h: 361: BYTE b0:1;
[; ;GenericTypeDefs.h: 362: BYTE b1:1;
[; ;GenericTypeDefs.h: 363: BYTE b2:1;
[; ;GenericTypeDefs.h: 364: BYTE b3:1;
[; ;GenericTypeDefs.h: 365: BYTE b4:1;
[; ;GenericTypeDefs.h: 366: BYTE b5:1;
[; ;GenericTypeDefs.h: 367: BYTE b6:1;
[; ;GenericTypeDefs.h: 368: BYTE b7:1;
[; ;GenericTypeDefs.h: 369: } bits;
[; ;GenericTypeDefs.h: 370: } BYTE_VAL, BYTE_BITS;
[; ;GenericTypeDefs.h: 372: typedef union
[; ;GenericTypeDefs.h: 373: {
[; ;GenericTypeDefs.h: 374: WORD Val;
[; ;GenericTypeDefs.h: 375: BYTE v[2] ;
[; ;GenericTypeDefs.h: 376: struct 
[; ;GenericTypeDefs.h: 377: {
[; ;GenericTypeDefs.h: 378: BYTE LB;
[; ;GenericTypeDefs.h: 379: BYTE HB;
[; ;GenericTypeDefs.h: 380: } byte;
[; ;GenericTypeDefs.h: 381: struct 
[; ;GenericTypeDefs.h: 382: {
[; ;GenericTypeDefs.h: 383: BYTE b0:1;
[; ;GenericTypeDefs.h: 384: BYTE b1:1;
[; ;GenericTypeDefs.h: 385: BYTE b2:1;
[; ;GenericTypeDefs.h: 386: BYTE b3:1;
[; ;GenericTypeDefs.h: 387: BYTE b4:1;
[; ;GenericTypeDefs.h: 388: BYTE b5:1;
[; ;GenericTypeDefs.h: 389: BYTE b6:1;
[; ;GenericTypeDefs.h: 390: BYTE b7:1;
[; ;GenericTypeDefs.h: 391: BYTE b8:1;
[; ;GenericTypeDefs.h: 392: BYTE b9:1;
[; ;GenericTypeDefs.h: 393: BYTE b10:1;
[; ;GenericTypeDefs.h: 394: BYTE b11:1;
[; ;GenericTypeDefs.h: 395: BYTE b12:1;
[; ;GenericTypeDefs.h: 396: BYTE b13:1;
[; ;GenericTypeDefs.h: 397: BYTE b14:1;
[; ;GenericTypeDefs.h: 398: BYTE b15:1;
[; ;GenericTypeDefs.h: 399: } bits;
[; ;GenericTypeDefs.h: 400: } WORD_VAL, WORD_BITS;
[; ;GenericTypeDefs.h: 402: typedef union
[; ;GenericTypeDefs.h: 403: {
[; ;GenericTypeDefs.h: 404: DWORD Val;
[; ;GenericTypeDefs.h: 405: WORD w[2] ;
[; ;GenericTypeDefs.h: 406: BYTE v[4] ;
[; ;GenericTypeDefs.h: 407: struct 
[; ;GenericTypeDefs.h: 408: {
[; ;GenericTypeDefs.h: 409: WORD LW;
[; ;GenericTypeDefs.h: 410: WORD HW;
[; ;GenericTypeDefs.h: 411: } word;
[; ;GenericTypeDefs.h: 412: struct 
[; ;GenericTypeDefs.h: 413: {
[; ;GenericTypeDefs.h: 414: BYTE LB;
[; ;GenericTypeDefs.h: 415: BYTE HB;
[; ;GenericTypeDefs.h: 416: BYTE UB;
[; ;GenericTypeDefs.h: 417: BYTE MB;
[; ;GenericTypeDefs.h: 418: } byte;
[; ;GenericTypeDefs.h: 419: struct 
[; ;GenericTypeDefs.h: 420: {
[; ;GenericTypeDefs.h: 421: WORD_VAL low;
[; ;GenericTypeDefs.h: 422: WORD_VAL high;
[; ;GenericTypeDefs.h: 423: }wordUnion;
[; ;GenericTypeDefs.h: 424: struct 
[; ;GenericTypeDefs.h: 425: {
[; ;GenericTypeDefs.h: 426: BYTE b0:1;
[; ;GenericTypeDefs.h: 427: BYTE b1:1;
[; ;GenericTypeDefs.h: 428: BYTE b2:1;
[; ;GenericTypeDefs.h: 429: BYTE b3:1;
[; ;GenericTypeDefs.h: 430: BYTE b4:1;
[; ;GenericTypeDefs.h: 431: BYTE b5:1;
[; ;GenericTypeDefs.h: 432: BYTE b6:1;
[; ;GenericTypeDefs.h: 433: BYTE b7:1;
[; ;GenericTypeDefs.h: 434: BYTE b8:1;
[; ;GenericTypeDefs.h: 435: BYTE b9:1;
[; ;GenericTypeDefs.h: 436: BYTE b10:1;
[; ;GenericTypeDefs.h: 437: BYTE b11:1;
[; ;GenericTypeDefs.h: 438: BYTE b12:1;
[; ;GenericTypeDefs.h: 439: BYTE b13:1;
[; ;GenericTypeDefs.h: 440: BYTE b14:1;
[; ;GenericTypeDefs.h: 441: BYTE b15:1;
[; ;GenericTypeDefs.h: 442: BYTE b16:1;
[; ;GenericTypeDefs.h: 443: BYTE b17:1;
[; ;GenericTypeDefs.h: 444: BYTE b18:1;
[; ;GenericTypeDefs.h: 445: BYTE b19:1;
[; ;GenericTypeDefs.h: 446: BYTE b20:1;
[; ;GenericTypeDefs.h: 447: BYTE b21:1;
[; ;GenericTypeDefs.h: 448: BYTE b22:1;
[; ;GenericTypeDefs.h: 449: BYTE b23:1;
[; ;GenericTypeDefs.h: 450: BYTE b24:1;
[; ;GenericTypeDefs.h: 451: BYTE b25:1;
[; ;GenericTypeDefs.h: 452: BYTE b26:1;
[; ;GenericTypeDefs.h: 453: BYTE b27:1;
[; ;GenericTypeDefs.h: 454: BYTE b28:1;
[; ;GenericTypeDefs.h: 455: BYTE b29:1;
[; ;GenericTypeDefs.h: 456: BYTE b30:1;
[; ;GenericTypeDefs.h: 457: BYTE b31:1;
[; ;GenericTypeDefs.h: 458: } bits;
[; ;GenericTypeDefs.h: 459: } DWORD_VAL;
[; ;GenericTypeDefs.h: 462: typedef union
[; ;GenericTypeDefs.h: 463: {
[; ;GenericTypeDefs.h: 464: QWORD Val;
[; ;GenericTypeDefs.h: 465: DWORD d[2] ;
[; ;GenericTypeDefs.h: 466: WORD w[4] ;
[; ;GenericTypeDefs.h: 467: BYTE v[8] ;
[; ;GenericTypeDefs.h: 468: struct 
[; ;GenericTypeDefs.h: 469: {
[; ;GenericTypeDefs.h: 470: DWORD LD;
[; ;GenericTypeDefs.h: 471: DWORD HD;
[; ;GenericTypeDefs.h: 472: } dword;
[; ;GenericTypeDefs.h: 473: struct 
[; ;GenericTypeDefs.h: 474: {
[; ;GenericTypeDefs.h: 475: WORD LW;
[; ;GenericTypeDefs.h: 476: WORD HW;
[; ;GenericTypeDefs.h: 477: WORD UW;
[; ;GenericTypeDefs.h: 478: WORD MW;
[; ;GenericTypeDefs.h: 479: } word;
[; ;GenericTypeDefs.h: 480: struct 
[; ;GenericTypeDefs.h: 481: {
[; ;GenericTypeDefs.h: 482: BYTE b0:1;
[; ;GenericTypeDefs.h: 483: BYTE b1:1;
[; ;GenericTypeDefs.h: 484: BYTE b2:1;
[; ;GenericTypeDefs.h: 485: BYTE b3:1;
[; ;GenericTypeDefs.h: 486: BYTE b4:1;
[; ;GenericTypeDefs.h: 487: BYTE b5:1;
[; ;GenericTypeDefs.h: 488: BYTE b6:1;
[; ;GenericTypeDefs.h: 489: BYTE b7:1;
[; ;GenericTypeDefs.h: 490: BYTE b8:1;
[; ;GenericTypeDefs.h: 491: BYTE b9:1;
[; ;GenericTypeDefs.h: 492: BYTE b10:1;
[; ;GenericTypeDefs.h: 493: BYTE b11:1;
[; ;GenericTypeDefs.h: 494: BYTE b12:1;
[; ;GenericTypeDefs.h: 495: BYTE b13:1;
[; ;GenericTypeDefs.h: 496: BYTE b14:1;
[; ;GenericTypeDefs.h: 497: BYTE b15:1;
[; ;GenericTypeDefs.h: 498: BYTE b16:1;
[; ;GenericTypeDefs.h: 499: BYTE b17:1;
[; ;GenericTypeDefs.h: 500: BYTE b18:1;
[; ;GenericTypeDefs.h: 501: BYTE b19:1;
[; ;GenericTypeDefs.h: 502: BYTE b20:1;
[; ;GenericTypeDefs.h: 503: BYTE b21:1;
[; ;GenericTypeDefs.h: 504: BYTE b22:1;
[; ;GenericTypeDefs.h: 505: BYTE b23:1;
[; ;GenericTypeDefs.h: 506: BYTE b24:1;
[; ;GenericTypeDefs.h: 507: BYTE b25:1;
[; ;GenericTypeDefs.h: 508: BYTE b26:1;
[; ;GenericTypeDefs.h: 509: BYTE b27:1;
[; ;GenericTypeDefs.h: 510: BYTE b28:1;
[; ;GenericTypeDefs.h: 511: BYTE b29:1;
[; ;GenericTypeDefs.h: 512: BYTE b30:1;
[; ;GenericTypeDefs.h: 513: BYTE b31:1;
[; ;GenericTypeDefs.h: 514: BYTE b32:1;
[; ;GenericTypeDefs.h: 515: BYTE b33:1;
[; ;GenericTypeDefs.h: 516: BYTE b34:1;
[; ;GenericTypeDefs.h: 517: BYTE b35:1;
[; ;GenericTypeDefs.h: 518: BYTE b36:1;
[; ;GenericTypeDefs.h: 519: BYTE b37:1;
[; ;GenericTypeDefs.h: 520: BYTE b38:1;
[; ;GenericTypeDefs.h: 521: BYTE b39:1;
[; ;GenericTypeDefs.h: 522: BYTE b40:1;
[; ;GenericTypeDefs.h: 523: BYTE b41:1;
[; ;GenericTypeDefs.h: 524: BYTE b42:1;
[; ;GenericTypeDefs.h: 525: BYTE b43:1;
[; ;GenericTypeDefs.h: 526: BYTE b44:1;
[; ;GenericTypeDefs.h: 527: BYTE b45:1;
[; ;GenericTypeDefs.h: 528: BYTE b46:1;
[; ;GenericTypeDefs.h: 529: BYTE b47:1;
[; ;GenericTypeDefs.h: 530: BYTE b48:1;
[; ;GenericTypeDefs.h: 531: BYTE b49:1;
[; ;GenericTypeDefs.h: 532: BYTE b50:1;
[; ;GenericTypeDefs.h: 533: BYTE b51:1;
[; ;GenericTypeDefs.h: 534: BYTE b52:1;
[; ;GenericTypeDefs.h: 535: BYTE b53:1;
[; ;GenericTypeDefs.h: 536: BYTE b54:1;
[; ;GenericTypeDefs.h: 537: BYTE b55:1;
[; ;GenericTypeDefs.h: 538: BYTE b56:1;
[; ;GenericTypeDefs.h: 539: BYTE b57:1;
[; ;GenericTypeDefs.h: 540: BYTE b58:1;
[; ;GenericTypeDefs.h: 541: BYTE b59:1;
[; ;GenericTypeDefs.h: 542: BYTE b60:1;
[; ;GenericTypeDefs.h: 543: BYTE b61:1;
[; ;GenericTypeDefs.h: 544: BYTE b62:1;
[; ;GenericTypeDefs.h: 545: BYTE b63:1;
[; ;GenericTypeDefs.h: 546: } bits;
[; ;GenericTypeDefs.h: 547: } QWORD_VAL;
[; ;flash.h: 113: extern void ReadFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);
[; ;flash.h: 120: extern void EraseFlash(unsigned long startaddr, unsigned long endaddr);
[; ;flash.h: 122: extern void WriteBlockFlash(unsigned long startaddr, unsigned char num_blocks, unsigned char *flash_array);
[; ;flash.h: 124: extern void WriteBytesFlash(unsigned long startaddr, unsigned int num_bytes, unsigned char *flash_array);
[; ;i2c.h: 769: void IdleI2C( void );
[; ;i2c.h: 771: void OpenI2C( unsigned char sync_mode, unsigned char slew );
[; ;i2c.h: 773: unsigned char WriteI2C( unsigned char data_out );
[; ;i2c.h: 775: signed char putsI2C( unsigned char *wrptr );
[; ;i2c.h: 777: unsigned char ReadI2C( void );
[; ;i2c.h: 779: void CloseI2C( void );
[; ;i2c.h: 893: unsigned char WriteI2C( unsigned char data_out );
[; ;i2c.h: 895: unsigned char getsI2C( unsigned char *rdptr, unsigned char length );
[; ;i2c.h: 902: unsigned char EEAckPolling( unsigned char control );
[; ;i2c.h: 904: unsigned char EEByteWrite( unsigned char control,
[; ;i2c.h: 905: unsigned char address,
[; ;i2c.h: 906: unsigned char data );
[; ;i2c.h: 908: unsigned int EECurrentAddRead( unsigned char control );
[; ;i2c.h: 910: unsigned char EEPageWrite( unsigned char control,
[; ;i2c.h: 911: unsigned char address,
[; ;i2c.h: 912: unsigned char *wrptr );
[; ;i2c.h: 914: unsigned int EERandomRead( unsigned char control, unsigned char address );
[; ;i2c.h: 916: unsigned char EESequentialRead( unsigned char control,
[; ;i2c.h: 917: unsigned char address,
[; ;i2c.h: 918: unsigned char *rdptr,
[; ;i2c.h: 919: unsigned char length );
[; ;mwire.h: 295: void OpenMwire( unsigned char sync_mode );
[; ;mwire.h: 297: unsigned char ReadMwire( unsigned char high_byte,
[; ;mwire.h: 298: unsigned char low_byte );
[; ;mwire.h: 311: unsigned char WriteMwire( unsigned char data_out );
[; ;mwire.h: 324: void getsMwire( unsigned char *rdptr, unsigned char length );
[; ;portb.h: 126: void OpenPORTB( unsigned char config);
[; ;portb.h: 162: void OpenRB0INT( unsigned char config);
[; ;portb.h: 180: void OpenRB1INT( unsigned char config);
[; ;portb.h: 197: void OpenRB2INT( unsigned char config);
[; ;pwm.h: 85: union PWMDC
[; ;pwm.h: 86: {
[; ;pwm.h: 87: unsigned int lpwm;
[; ;pwm.h: 88: char bpwm[2];
[; ;pwm.h: 89: };
[; ;pwm.h: 416: void OpenPWM1 ( char period);
[; ;pwm.h: 417: void SetDCPWM1 ( unsigned int duty_cycle);
[; ;pwm.h: 423: void SetOutputPWM1 ( unsigned char output_config,
[; ;pwm.h: 424: unsigned char pwm_mode);
[; ;pwm.h: 426: void ClosePWM1 (void);
[; ;pwm.h: 434: void OpenPWM2 ( char period);
[; ;pwm.h: 435: void SetDCPWM2( unsigned int duty_cycle);
[; ;pwm.h: 441: void ClosePWM2 (void);
[; ;reset.h: 16: char isMCLR(void);
[; ;reset.h: 17: void StatusReset(void);
[; ;reset.h: 18: char isPOR(void);
[; ;reset.h: 19: char isWU(void);
[; ;reset.h: 22: char isBOR(void);
[; ;reset.h: 26: char isWDTTO(void);
[; ;reset.h: 27: char isWDTWU(void);
[; ;reset.h: 31: char isLVD(void);
[; ;rtcc.h: 509: void Open_RTCC(void);
[; ;rtcc.h: 510: void Close_RTCC(void);
[; ;rtcc.h: 511: unsigned char update_RTCC(void);
[; ;sw_i2c.h: 97: void SWStopI2C ( void );
[; ;sw_i2c.h: 98: void SWStartI2C ( void );
[; ;sw_i2c.h: 99: void SWRestartI2C ( void );
[; ;sw_i2c.h: 100: void SWStopI2C ( void );
[; ;sw_i2c.h: 102: signed char SWAckI2C( void );
[; ;sw_i2c.h: 103: signed char Clock_test( void );
[; ;sw_i2c.h: 104: unsigned int SWReadI2C( void );
[; ;sw_i2c.h: 105: signed char SWWriteI2C(  unsigned char data_out );
[; ;sw_i2c.h: 106: signed char SWGetsI2C(  unsigned char *rdptr,  unsigned char length );
[; ;sw_i2c.h: 107: signed char SWPutsI2C(  unsigned char *wrptr );
[; ;sw_spi.h: 84: void OpenSWSPI(void);
[; ;sw_spi.h: 87: char WriteSWSPI( char output);
[; ;sw_spi.h: 90: void SetCSSWSPI(void);
[; ;sw_spi.h: 93: void ClearCSSWSPI(void);
[; ;sw_uart.h: 47: void OpenUART(void);
[; ;sw_uart.h: 49: unsigned char ReadUART(void);
[; ;sw_uart.h: 51: void WriteUART( unsigned char);
[; ;sw_uart.h: 53: void getsUART( char *, unsigned char);
[; ;sw_uart.h: 55: void putsUART( char *);
[; ;sw_uart.h: 79: extern void DelayRXBitUART (void);
[; ;sw_uart.h: 80: extern void DelayRXHalfBitUART(void);
[; ;sw_uart.h: 81: extern void DelayTXBitUART (void);
[; ;timers.h: 36: union Timers
[; ;timers.h: 37: {
[; ;timers.h: 38: unsigned int lt;
[; ;timers.h: 39: char bt[2];
[; ;timers.h: 40: };
[; ;timers.h: 110: void OpenTimer0 ( unsigned char config);
[; ;timers.h: 111: void CloseTimer0 (void);
[; ;timers.h: 112: unsigned int ReadTimer0 (void);
[; ;timers.h: 113: void WriteTimer0 ( unsigned int timer0);
[; ;timers.h: 222: void OpenTimer1 ( unsigned char config);
[; ;timers.h: 223: void CloseTimer1 (void);
[; ;timers.h: 224: unsigned int ReadTimer1 (void);
[; ;timers.h: 225: void WriteTimer1 ( unsigned int timer1);
[; ;timers.h: 311: void OpenTimer2 ( unsigned char config);
[; ;timers.h: 312: void CloseTimer2 (void);
[; ;timers.h: 377: void OpenTimer3 ( unsigned char config);
[; ;timers.h: 378: void CloseTimer3 (void);
[; ;timers.h: 379: unsigned int ReadTimer3 (void);
[; ;timers.h: 380: void WriteTimer3 ( unsigned int timer3);
[; ;timers.h: 1141: void SetTmrCCPSrc( unsigned char );
[; ;usart.h: 392: union USART
[; ;usart.h: 393: {
[; ;usart.h: 394: unsigned char val;
[; ;usart.h: 395: struct
[; ;usart.h: 396: {
[; ;usart.h: 397: unsigned RX_NINE:1;
[; ;usart.h: 398: unsigned TX_NINE:1;
[; ;usart.h: 399: unsigned FRAME_ERROR:1;
[; ;usart.h: 400: unsigned OVERRUN_ERROR:1;
[; ;usart.h: 401: unsigned fill:4;
[; ;usart.h: 402: };
[; ;usart.h: 403: };
[; ;usart.h: 404: extern union USART USART_Status;
[; ;usart.h: 405: void OpenUSART ( unsigned char config, unsigned spbrg);
[; ;usart.h: 420: char ReadUSART (void);
[; ;usart.h: 421: void WriteUSART ( char data);
[; ;usart.h: 422: void getsUSART ( char *buffer, unsigned char len);
[; ;usart.h: 423: void putsUSART ( char *data);
[; ;usart.h: 424: void putrsUSART ( const  char *data);
[; ;usart.h: 478: void baudUSART ( unsigned char baudconfig);
[; ;xlcd.h: 79: void OpenXLCD( unsigned char);
[; ;xlcd.h: 84: void SetCGRamAddr( unsigned char);
[; ;xlcd.h: 89: void SetDDRamAddr( unsigned char);
[; ;xlcd.h: 94: unsigned char BusyXLCD(void);
[; ;xlcd.h: 99: unsigned char ReadAddrXLCD(void);
[; ;xlcd.h: 104: char ReadDataXLCD(void);
[; ;xlcd.h: 109: void WriteCmdXLCD( unsigned char);
[; ;xlcd.h: 114: void WriteDataXLCD( char);
[; ;xlcd.h: 124: void putsXLCD( char *);
[; ;xlcd.h: 129: void putrsXLCD(const char *);
[; ;xlcd.h: 132: extern void DelayFor18TCY(void);
[; ;xlcd.h: 133: extern void DelayPORXLCD(void);
[; ;xlcd.h: 134: extern void DelayXLCD(void);
[; ;pic18.h: 18: __attribute__((unsupported("The flash_write routine is no longer supported. Please use the peripheral library functions: WriteBytesFlash, WriteBlockFlash or WriteWordFlash"))) void flash_write(const unsigned char *, unsigned int, far unsigned char *)
[; ;pic18.h: 60: extern unsigned char idloc_read(unsigned char reg_no);
[; ;pic18.h: 61: extern void idloc_write(unsigned char reg_no,unsigned char data);
[; ;pic18.h: 186: extern void _delay(unsigned long);
[; ;pic18.h: 188: extern void _delaywdt(unsigned long);
[; ;pic18.h: 190: extern void _delay3(unsigned char);
"3 E:\Program\PRGPIC\testPIC18F4520\sigma\sigama.c
[v _table0 `uc ~T0 -> 0 `x e ]
[i _table0
:U ..
-> -> 192 `i `uc
-> -> 249 `i `uc
-> -> 164 `i `uc
-> -> 176 `i `uc
-> -> 153 `i `uc
-> -> 146 `i `uc
-> -> 130 `i `uc
-> -> 248 `i `uc
-> -> 128 `i `uc
-> -> 144 `i `uc
"4
-> -> 136 `i `uc
-> -> 131 `i `uc
-> -> 198 `i `uc
-> -> 161 `i `uc
-> -> 134 `i `uc
-> -> 142 `i `uc
-> -> 0 `i `uc
..
]
[; ;sigama.c: 3: unsigned char table0[]={0xc0,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xf8,0x80,0x90,
[; ;sigama.c: 4: 0x88,0x83,0xc6,0xa1,0x86,0x8e,0};
"5
[v _table1 `uc ~T0 -> 0 `x e ]
[i _table1
:U ..
-> -> 33 `i `uc
-> -> 34 `i `uc
-> -> 36 `i `uc
-> -> 40 `i `uc
..
]
[; ;sigama.c: 5: unsigned char table1[]={0x21,0x22,0x24,0x28 } ;
"7
[v _delay1 `(v ~T0 1 ef1`ui ]
{
[; ;sigama.c: 6: void delay1( unsigned int x)
[; ;sigama.c: 7: {
[e :U _delay1 ]
[v _x `ui ~T0 1 r1 ]
[f ]
"8
[v _i `ui ~T0 1 a ]
[v _j `ui ~T0 1 a ]
[; ;sigama.c: 8: unsigned int i,j;
[; ;sigama.c: 9: for(i=0;i<x;i++)
"9
{
[e = _i -> -> 0 `i `ui ]
[e $U 562  ]
"10
[e :U 559 ]
[; ;sigama.c: 10: for(j=0;j<100;j++);
{
[e = _j -> -> 0 `i `ui ]
[e $ < _j -> -> 100 `i `ui 563  ]
[e $U 564  ]
[e :U 563 ]
[e ++ _j -> -> 1 `i `ui ]
[e $ < _j -> -> 100 `i `ui 563  ]
[e :U 564 ]
}
"9
[e ++ _i -> -> 1 `i `ui ]
[e :U 562 ]
[e $ < _i _x 559  ]
[e :U 560 ]
"10
}
[; ;sigama.c: 11: }
"11
[e :UE 558 ]
}
"13
[v _sigma_portint `(v ~T0 1 ef ]
{
[; ;sigama.c: 12: void sigma_portint()
[; ;sigama.c: 13: {
[e :U _sigma_portint ]
[f ]
[; ;sigama.c: 14: TRISA=0X00;
"14
[e = _TRISA -> -> 0 `i `uc ]
[; ;sigama.c: 15: TRISB=0X00;
"15
[e = _TRISB -> -> 0 `i `uc ]
[; ;sigama.c: 16: }
"16
[e :UE 566 ]
}
"18
[v _show `(v ~T0 1 e ]
{
[; ;sigama.c: 17: void show(show_bit,show_code)
[; ;sigama.c: 18: {
[e :U _show ]
[v _show_bit `i ~T0 1 p ]
[v _show_code `i ~T0 1 p ]
[f ]
[; ;sigama.c: 19: PORTA=table1[show_bit];
"19
[e = _PORTA *U + &U _table1 * -> -> _show_bit `ui `ux -> -> # *U &U _table1 `ui `ux ]
[; ;sigama.c: 20: PORTB=table0[show_code];
"20
[e = _PORTB *U + &U _table0 * -> -> _show_code `ui `ux -> -> # *U &U _table0 `ui `ux ]
[; ;sigama.c: 21: delay1(5);
"21
[e ( _delay1 (1 -> -> 5 `i `ui ]
[; ;sigama.c: 22: }
"22
[e :UE 567 ]
}
"25
[v _main `(v ~T0 1 ef ]
{
[; ;sigama.c: 24: void main()
[; ;sigama.c: 25: {
[e :U _main ]
[f ]
"27
[v _n `ui ~T0 1 a ]
[; ;sigama.c: 27: unsigned int n=0Xd6,k=0,i=0; PORTB=0XFF;
[e = _n -> -> 214 `i `ui ]
[v _k `ui ~T0 1 a ]
[e = _k -> -> 0 `i `ui ]
[v _i `ui ~T0 1 a ]
[e = _i -> -> 0 `i `ui ]
[e = _PORTB -> -> 255 `i `uc ]
[; ;sigama.c: 28: sigma_portint();
"28
[e ( _sigma_portint ..  ]
[; ;sigama.c: 29: while(1)
"29
[e :U 570 ]
[; ;sigama.c: 30: {k++;
"30
{
[e ++ _k -> -> 1 `i `ui ]
[; ;sigama.c: 31: show(0,i);
"31
[e ( _show , -> 0 `i _i ]
[; ;sigama.c: 32: show(1,i);
"32
[e ( _show , -> 1 `i _i ]
[; ;sigama.c: 33: show(2,i);
"33
[e ( _show , -> 2 `i _i ]
[; ;sigama.c: 34: show(3,i);
"34
[e ( _show , -> 3 `i _i ]
[; ;sigama.c: 37: if(k==20 | k==40){i++;if(i==17){i=0;}}
"37
[e $ ! | == _k -> -> 20 `i `ui == _k -> -> 40 `i `ui 572  ]
{
[e ++ _i -> -> 1 `i `ui ]
[e $ ! == _i -> -> 17 `i `ui 573  ]
{
[e = _i -> -> 0 `i `ui ]
}
[e :U 573 ]
}
[e :U 572 ]
[; ;sigama.c: 39: if(k==50){k=0,n=~n; PORTA=n;}
"39
[e $ ! == _k -> -> 50 `i `ui 574  ]
{
[e ; = _k -> -> 0 `i `ui = _n ~ _n ]
[e = _PORTA -> _n `uc ]
}
[e $U 575  ]
"40
[e :U 574 ]
[; ;sigama.c: 40: else PORTA=n;
[e = _PORTA -> _n `uc ]
[e :U 575 ]
[; ;sigama.c: 41: delay1(10);
"41
[e ( _delay1 (1 -> -> 10 `i `ui ]
"43
}
[e :U 569 ]
"29
[e $U 570  ]
[e :U 571 ]
[; ;sigama.c: 43: }
[; ;sigama.c: 44: }
"44
[e :UE 568 ]
}
